See ChangeLog: Mon Jan 24 22:24:38 CET 2000 Werner Koch
[gnupg.git] / mpi / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2    Note: I added some stuff for use with g10
3
4 Copyright (C) 1991, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
5
6 This file is free software; you can redistribute it and/or modify
7 it under the terms of the GNU Library General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or (at your
9 option) any later version.
10
11 This file is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
14 License for more details.
15
16 You should have received a copy of the GNU Library General Public License
17 along with this file; see the file COPYING.LIB.  If not, write to
18 the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
19 MA 02111-1307, USA. */
20
21 /* You have to define the following before including this file:
22
23    UWtype -- An unsigned type, default type for operations (typically a "word")
24    UHWtype -- An unsigned type, at least half the size of UWtype.
25    UDWtype -- An unsigned type, at least twice as large a UWtype
26    W_TYPE_SIZE -- size in bits of UWtype
27
28    SItype, USItype -- Signed and unsigned 32 bit types.
29    DItype, UDItype -- Signed and unsigned 64 bit types.
30
31    On a 32 bit machine UWtype should typically be USItype;
32    on a 64 bit machine, UWtype should typically be UDItype.
33 */
34
35 #define __BITS4 (W_TYPE_SIZE / 4)
36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
39
40 /* This is used to make sure no undesirable sharing between different libraries
41    that use this file takes place.  */
42 #ifndef __MPN
43 #define __MPN(x) __##x
44 #endif
45
46 /* Define auxiliary asm macros.
47
48    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
49    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
50    word product in HIGH_PROD and LOW_PROD.
51
52    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
53    UDWtype product.  This is just a variant of umul_ppmm.
54
55    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
56    denominator) divides a UDWtype, composed by the UWtype integers
57    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
58    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
59    than DENOMINATOR for correct operation.  If, in addition, the most
60    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
61    UDIV_NEEDS_NORMALIZATION is defined to 1.
62
63    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
64    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
65    is rounded towards 0.
66
67    5) count_leading_zeros(count, x) counts the number of zero-bits from the
68    msb to the first non-zero bit in the UWtype X.  This is the number of
69    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
70    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
71
72    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
73    from the least significant end.
74
75    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
76    high_addend_2, low_addend_2) adds two UWtype integers, composed by
77    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
78    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
79    (i.e. carry out) is not stored anywhere, and is lost.
80
81    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
82    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
83    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
84    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
85    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
86    and is lost.
87
88    If any of these macros are left undefined for a particular CPU,
89    C macros are used.  */
90
91 /* The CPUs come in alphabetical order below.
92
93    Please add support for more CPUs here, or improve the current support
94    for the CPUs below!  */
95
96 #if defined (__GNUC__) && !defined (NO_ASM)
97
98 /* We sometimes need to clobber "cc" with gcc2, but that would not be
99    understood by gcc1.  Use cpp to avoid major code duplication.  */
100 #if __GNUC__ < 2
101 #define __CLOBBER_CC
102 #define __AND_CLOBBER_CC
103 #else /* __GNUC__ >= 2 */
104 #define __CLOBBER_CC : "cc"
105 #define __AND_CLOBBER_CC , "cc"
106 #endif /* __GNUC__ < 2 */
107
108
109 /***************************************
110  **************  A29K  *****************
111  ***************************************/
112 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
113 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
114   __asm__ ("add %1,%4,%5
115         addc %0,%2,%3"                                                  \
116            : "=r" ((USItype)(sh)),                                      \
117             "=&r" ((USItype)(sl))                                       \
118            : "%r" ((USItype)(ah)),                                      \
119              "rI" ((USItype)(bh)),                                      \
120              "%r" ((USItype)(al)),                                      \
121              "rI" ((USItype)(bl)))
122 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
123   __asm__ ("sub %1,%4,%5
124         subc %0,%2,%3"                                                  \
125            : "=r" ((USItype)(sh)),                                      \
126              "=&r" ((USItype)(sl))                                      \
127            : "r" ((USItype)(ah)),                                       \
128              "rI" ((USItype)(bh)),                                      \
129              "r" ((USItype)(al)),                                       \
130              "rI" ((USItype)(bl)))
131 #define umul_ppmm(xh, xl, m0, m1) \
132   do {                                                                  \
133     USItype __m0 = (m0), __m1 = (m1);                                   \
134     __asm__ ("multiplu %0,%1,%2"                                        \
135              : "=r" ((USItype)(xl))                                     \
136              : "r" (__m0),                                              \
137                "r" (__m1));                                             \
138     __asm__ ("multmu %0,%1,%2"                                          \
139              : "=r" ((USItype)(xh))                                     \
140              : "r" (__m0),                                              \
141                "r" (__m1));                                             \
142   } while (0)
143 #define udiv_qrnnd(q, r, n1, n0, d) \
144   __asm__ ("dividu %0,%3,%4"                                            \
145            : "=r" ((USItype)(q)),                                       \
146              "=q" ((USItype)(r))                                        \
147            : "1" ((USItype)(n1)),                                       \
148              "r" ((USItype)(n0)),                                       \
149              "r" ((USItype)(d)))
150 #define count_leading_zeros(count, x) \
151     __asm__ ("clz %0,%1"                                                \
152              : "=r" ((USItype)(count))                                  \
153              : "r" ((USItype)(x)))
154 #define COUNT_LEADING_ZEROS_0 32
155 #endif /* __a29k__ */
156
157
158 #if defined (__alpha) && W_TYPE_SIZE == 64
159 #define umul_ppmm(ph, pl, m0, m1) \
160   do {                                                                  \
161     UDItype __m0 = (m0), __m1 = (m1);                                   \
162     __asm__ ("umulh %r1,%2,%0"                                          \
163              : "=r" ((UDItype) ph)                                      \
164              : "%rJ" (__m0),                                            \
165                "rI" (__m1));                                            \
166     (pl) = __m0 * __m1;                                                 \
167   } while (0)
168 #define UMUL_TIME 46
169 #ifndef LONGLONG_STANDALONE
170 #define udiv_qrnnd(q, r, n1, n0, d) \
171   do { UDItype __r;                                                     \
172     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
173     (r) = __r;                                                          \
174   } while (0)
175 extern UDItype __udiv_qrnnd ();
176 #define UDIV_TIME 220
177 #endif /* LONGLONG_STANDALONE */
178 #endif /* __alpha */
179
180 /***************************************
181  **************  ARM  ******************
182  ***************************************/
183 #if defined (__arm__) && W_TYPE_SIZE == 32
184 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
185   __asm__ ("adds        %1, %4, %5
186         adc     %0, %2, %3"                                             \
187            : "=r" ((USItype)(sh)),                                      \
188              "=&r" ((USItype)(sl))                                      \
189            : "%r" ((USItype)(ah)),                                      \
190              "rI" ((USItype)(bh)),                                      \
191              "%r" ((USItype)(al)),                                      \
192              "rI" ((USItype)(bl)))
193 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
194   __asm__ ("subs        %1, %4, %5
195         sbc     %0, %2, %3"                                             \
196            : "=r" ((USItype)(sh)),                                      \
197              "=&r" ((USItype)(sl))                                      \
198            : "r" ((USItype)(ah)),                                       \
199              "rI" ((USItype)(bh)),                                      \
200              "r" ((USItype)(al)),                                       \
201              "rI" ((USItype)(bl)))
202 #define umul_ppmm(xh, xl, a, b) \
203   __asm__ ("%@ Inlined umul_ppmm
204         mov     %|r0, %2, lsr #16
205         mov     %|r2, %3, lsr #16
206         bic     %|r1, %2, %|r0, lsl #16
207         bic     %|r2, %3, %|r2, lsl #16
208         mul     %1, %|r1, %|r2
209         mul     %|r2, %|r0, %|r2
210         mul     %|r1, %0, %|r1
211         mul     %0, %|r0, %0
212         adds    %|r1, %|r2, %|r1
213         addcs   %0, %0, #65536
214         adds    %1, %1, %|r1, lsl #16
215         adc     %0, %0, %|r1, lsr #16"                                  \
216            : "=&r" ((USItype)(xh)),                                     \
217              "=r" ((USItype)(xl))                                       \
218            : "r" ((USItype)(a)),                                        \
219              "r" ((USItype)(b))                                         \
220            : "r0", "r1", "r2")
221 #define UMUL_TIME 20
222 #define UDIV_TIME 100
223 #endif /* __arm__ */
224
225 /***************************************
226  **************  CLIPPER  **************
227  ***************************************/
228 #if defined (__clipper__) && W_TYPE_SIZE == 32
229 #define umul_ppmm(w1, w0, u, v) \
230   ({union {UDItype __ll;                                                \
231            struct {USItype __l, __h;} __i;                              \
232           } __xx;                                                       \
233   __asm__ ("mulwux %2,%0"                                               \
234            : "=r" (__xx.__ll)                                           \
235            : "%0" ((USItype)(u)),                                       \
236              "r" ((USItype)(v)));                                       \
237   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
238 #define smul_ppmm(w1, w0, u, v) \
239   ({union {DItype __ll;                                                 \
240            struct {SItype __l, __h;} __i;                               \
241           } __xx;                                                       \
242   __asm__ ("mulwx %2,%0"                                                \
243            : "=r" (__xx.__ll)                                           \
244            : "%0" ((SItype)(u)),                                        \
245              "r" ((SItype)(v)));                                        \
246   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
247 #define __umulsidi3(u, v) \
248   ({UDItype __w;                                                        \
249     __asm__ ("mulwux %2,%0"                                             \
250              : "=r" (__w)                                               \
251              : "%0" ((USItype)(u)),                                     \
252                "r" ((USItype)(v)));                                     \
253     __w; })
254 #endif /* __clipper__ */
255
256
257 /***************************************
258  **************  GMICRO  ***************
259  ***************************************/
260 #if defined (__gmicro__) && W_TYPE_SIZE == 32
261 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
262   __asm__ ("add.w %5,%1
263         addx %3,%0"                                                     \
264            : "=g" ((USItype)(sh)),                                      \
265              "=&g" ((USItype)(sl))                                      \
266            : "%0" ((USItype)(ah)),                                      \
267              "g" ((USItype)(bh)),                                       \
268              "%1" ((USItype)(al)),                                      \
269              "g" ((USItype)(bl)))
270 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
271   __asm__ ("sub.w %5,%1
272         subx %3,%0"                                                     \
273            : "=g" ((USItype)(sh)),                                      \
274              "=&g" ((USItype)(sl))                                      \
275            : "0" ((USItype)(ah)),                                       \
276              "g" ((USItype)(bh)),                                       \
277              "1" ((USItype)(al)),                                       \
278              "g" ((USItype)(bl)))
279 #define umul_ppmm(ph, pl, m0, m1) \
280   __asm__ ("mulx %3,%0,%1"                                              \
281            : "=g" ((USItype)(ph)),                                      \
282              "=r" ((USItype)(pl))                                       \
283            : "%0" ((USItype)(m0)),                                      \
284              "g" ((USItype)(m1)))
285 #define udiv_qrnnd(q, r, nh, nl, d) \
286   __asm__ ("divx %4,%0,%1"                                              \
287            : "=g" ((USItype)(q)),                                       \
288              "=r" ((USItype)(r))                                        \
289            : "1" ((USItype)(nh)),                                       \
290              "0" ((USItype)(nl)),                                       \
291              "g" ((USItype)(d)))
292 #define count_leading_zeros(count, x) \
293   __asm__ ("bsch/1 %1,%0"                                               \
294            : "=g" (count)                                               \
295            : "g" ((USItype)(x)),                                        \
296              "0" ((USItype)0))
297 #endif
298
299
300 /***************************************
301  **************  HPPA  *****************
302  ***************************************/
303 #if defined (__hppa) && W_TYPE_SIZE == 32
304 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
305   __asm__ ("add %4,%5,%1
306         addc %2,%3,%0"                                                  \
307            : "=r" ((USItype)(sh)),                                      \
308              "=&r" ((USItype)(sl))                                      \
309            : "%rM" ((USItype)(ah)),                                     \
310              "rM" ((USItype)(bh)),                                      \
311              "%rM" ((USItype)(al)),                                     \
312              "rM" ((USItype)(bl)))
313 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
314   __asm__ ("sub %4,%5,%1
315         subb %2,%3,%0"                                                  \
316            : "=r" ((USItype)(sh)),                                      \
317              "=&r" ((USItype)(sl))                                      \
318            : "rM" ((USItype)(ah)),                                      \
319              "rM" ((USItype)(bh)),                                      \
320              "rM" ((USItype)(al)),                                      \
321              "rM" ((USItype)(bl)))
322 #if defined (_PA_RISC1_1)
323 #define umul_ppmm(wh, wl, u, v) \
324   do {                                                                  \
325     union {UDItype __ll;                                                \
326            struct {USItype __h, __l;} __i;                              \
327           } __xx;                                                       \
328     __asm__ ("xmpyu %1,%2,%0"                                           \
329              : "=*f" (__xx.__ll)                                        \
330              : "*f" ((USItype)(u)),                                     \
331                "*f" ((USItype)(v)));                                    \
332     (wh) = __xx.__i.__h;                                                \
333     (wl) = __xx.__i.__l;                                                \
334   } while (0)
335 #define UMUL_TIME 8
336 #define UDIV_TIME 60
337 #else
338 #define UMUL_TIME 40
339 #define UDIV_TIME 80
340 #endif
341 #ifndef LONGLONG_STANDALONE
342 #define udiv_qrnnd(q, r, n1, n0, d) \
343   do { USItype __r;                                                     \
344     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
345     (r) = __r;                                                          \
346   } while (0)
347 extern USItype __udiv_qrnnd ();
348 #endif /* LONGLONG_STANDALONE */
349 #define count_leading_zeros(count, x) \
350   do {                                                                  \
351     USItype __tmp;                                                      \
352     __asm__ (                                                           \
353        "ldi             1,%0
354         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
355         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
356         ldo             16(%0),%0               ; Yes.  Perform add.
357         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
358         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
359         ldo             8(%0),%0                ; Yes.  Perform add.
360         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
361         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
362         ldo             4(%0),%0                ; Yes.  Perform add.
363         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
364         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
365         ldo             2(%0),%0                ; Yes.  Perform add.
366         extru           %1,30,1,%1              ; Extract bit 1.
367         sub             %0,%1,%0                ; Subtract it.
368         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
369   } while (0)
370 #endif /* hppa */
371
372
373 /***************************************
374  **************  I370  *****************
375  ***************************************/
376 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
377 #define umul_ppmm(xh, xl, m0, m1) \
378   do {                                                                  \
379     union {UDItype __ll;                                                \
380            struct {USItype __h, __l;} __i;                              \
381           } __xx;                                                       \
382     USItype __m0 = (m0), __m1 = (m1);                                   \
383     __asm__ ("mr %0,%3"                                                 \
384              : "=r" (__xx.__i.__h),                                     \
385                "=r" (__xx.__i.__l)                                      \
386              : "%1" (__m0),                                             \
387                "r" (__m1));                                             \
388     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
389     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
390              + (((SItype) __m1 >> 31) & __m0));                         \
391   } while (0)
392 #define smul_ppmm(xh, xl, m0, m1) \
393   do {                                                                  \
394     union {DItype __ll;                                                 \
395            struct {USItype __h, __l;} __i;                              \
396           } __xx;                                                       \
397     __asm__ ("mr %0,%3"                                                 \
398              : "=r" (__xx.__i.__h),                                     \
399                "=r" (__xx.__i.__l)                                      \
400              : "%1" (m0),                                               \
401                "r" (m1));                                               \
402     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
403   } while (0)
404 #define sdiv_qrnnd(q, r, n1, n0, d) \
405   do {                                                                  \
406     union {DItype __ll;                                                 \
407            struct {USItype __h, __l;} __i;                              \
408           } __xx;                                                       \
409     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
410     __asm__ ("dr %0,%2"                                                 \
411              : "=r" (__xx.__ll)                                         \
412              : "0" (__xx.__ll), "r" (d));                               \
413     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
414   } while (0)
415 #endif
416
417
418 /***************************************
419  **************  I386  *****************
420  ***************************************/
421 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
422 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
423   __asm__ ("addl %5,%1
424         adcl %3,%0"                                                     \
425            : "=r" ((USItype)(sh)),                                      \
426              "=&r" ((USItype)(sl))                                      \
427            : "%0" ((USItype)(ah)),                                      \
428              "g" ((USItype)(bh)),                                       \
429              "%1" ((USItype)(al)),                                      \
430              "g" ((USItype)(bl)))
431 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
432   __asm__ ("subl %5,%1
433         sbbl %3,%0"                                                     \
434            : "=r" ((USItype)(sh)),                                      \
435              "=&r" ((USItype)(sl))                                      \
436            : "0" ((USItype)(ah)),                                       \
437              "g" ((USItype)(bh)),                                       \
438              "1" ((USItype)(al)),                                       \
439              "g" ((USItype)(bl)))
440 #define umul_ppmm(w1, w0, u, v) \
441   __asm__ ("mull %3"                                                    \
442            : "=a" ((USItype)(w0)),                                      \
443              "=d" ((USItype)(w1))                                       \
444            : "%0" ((USItype)(u)),                                       \
445              "rm" ((USItype)(v)))
446 #define udiv_qrnnd(q, r, n1, n0, d) \
447   __asm__ ("divl %4"                                                    \
448            : "=a" ((USItype)(q)),                                       \
449              "=d" ((USItype)(r))                                        \
450            : "0" ((USItype)(n0)),                                       \
451              "1" ((USItype)(n1)),                                       \
452              "rm" ((USItype)(d)))
453 #define count_leading_zeros(count, x) \
454   do {                                                                  \
455     USItype __cbtmp;                                                    \
456     __asm__ ("bsrl %1,%0"                                               \
457              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
458     (count) = __cbtmp ^ 31;                                             \
459   } while (0)
460 #define count_trailing_zeros(count, x) \
461   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
462 #ifndef UMUL_TIME
463 #define UMUL_TIME 40
464 #endif
465 #ifndef UDIV_TIME
466 #define UDIV_TIME 40
467 #endif
468 #endif /* 80x86 */
469
470
471 /***************************************
472  **************  I860  *****************
473  ***************************************/
474 #if defined (__i860__) && W_TYPE_SIZE == 32
475 #define rshift_rhlc(r,h,l,c) \
476   __asm__ ("shr %3,r0,r0\;shrd %1,%2,%0"                                \
477            "=r" (r) : "r" (h), "r" (l), "rn" (c))
478 #endif /* i860 */
479
480 /***************************************
481  **************  I960  *****************
482  ***************************************/
483 #if defined (__i960__) && W_TYPE_SIZE == 32
484 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
485   __asm__ ("cmpo 1,0\;addc %5,%4,%1\;addc %3,%2,%0"                     \
486            : "=r" ((USItype)(sh)),                                      \
487              "=&r" ((USItype)(sl))                                      \
488            : "%dI" ((USItype)(ah)),                                     \
489              "dI" ((USItype)(bh)),                                      \
490              "%dI" ((USItype)(al)),                                     \
491              "dI" ((USItype)(bl)))
492 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
493   __asm__ ("cmpo 0,0\;subc %5,%4,%1\;subc %3,%2,%0"                     \
494            : "=r" ((USItype)(sh)),                                      \
495              "=&r" ((USItype)(sl))                                      \
496            : "dI" ((USItype)(ah)),                                      \
497              "dI" ((USItype)(bh)),                                      \
498              "dI" ((USItype)(al)),                                      \
499              "dI" ((USItype)(bl)))
500 #define umul_ppmm(w1, w0, u, v) \
501   ({union {UDItype __ll;                                                \
502            struct {USItype __l, __h;} __i;                              \
503           } __xx;                                                       \
504   __asm__ ("emul        %2,%1,%0"                                       \
505            : "=d" (__xx.__ll)                                           \
506            : "%dI" ((USItype)(u)),                                      \
507              "dI" ((USItype)(v)));                                      \
508   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
509 #define __umulsidi3(u, v) \
510   ({UDItype __w;                                                        \
511     __asm__ ("emul      %2,%1,%0"                                       \
512              : "=d" (__w)                                               \
513              : "%dI" ((USItype)(u)),                                    \
514                "dI" ((USItype)(v)));                                    \
515     __w; })
516 #define udiv_qrnnd(q, r, nh, nl, d) \
517   do {                                                                  \
518     union {UDItype __ll;                                                \
519            struct {USItype __l, __h;} __i;                              \
520           } __nn;                                                       \
521     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
522     __asm__ ("ediv %d,%n,%0"                                            \
523            : "=d" (__rq.__ll)                                           \
524            : "dI" (__nn.__ll),                                          \
525              "dI" ((USItype)(d)));                                      \
526     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
527   } while (0)
528 #define count_leading_zeros(count, x) \
529   do {                                                                  \
530     USItype __cbtmp;                                                    \
531     __asm__ ("scanbit %1,%0"                                            \
532              : "=r" (__cbtmp)                                           \
533              : "r" ((USItype)(x)));                                     \
534     (count) = __cbtmp ^ 31;                                             \
535   } while (0)
536 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
537 #if defined (__i960mx)          /* what is the proper symbol to test??? */
538 #define rshift_rhlc(r,h,l,c) \
539   do {                                                                  \
540     union {UDItype __ll;                                                \
541            struct {USItype __l, __h;} __i;                              \
542           } __nn;                                                       \
543     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
544     __asm__ ("shre %2,%1,%0"                                            \
545              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
546   }
547 #endif /* i960mx */
548 #endif /* i960 */
549
550
551 /***************************************
552  **************  68000  ****************
553  ***************************************/
554 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
555 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
556   __asm__ ("add%.l %5,%1
557         addx%.l %3,%0"                                                  \
558            : "=d" ((USItype)(sh)),                                      \
559              "=&d" ((USItype)(sl))                                      \
560            : "%0" ((USItype)(ah)),                                      \
561              "d" ((USItype)(bh)),                                       \
562              "%1" ((USItype)(al)),                                      \
563              "g" ((USItype)(bl)))
564 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
565   __asm__ ("sub%.l %5,%1
566         subx%.l %3,%0"                                                  \
567            : "=d" ((USItype)(sh)),                                      \
568              "=&d" ((USItype)(sl))                                      \
569            : "0" ((USItype)(ah)),                                       \
570              "d" ((USItype)(bh)),                                       \
571              "1" ((USItype)(al)),                                       \
572              "g" ((USItype)(bl)))
573 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
574 #define umul_ppmm(w1, w0, u, v) \
575   __asm__ ("mulu%.l %3,%1:%0"                                           \
576            : "=d" ((USItype)(w0)),                                      \
577              "=d" ((USItype)(w1))                                       \
578            : "%0" ((USItype)(u)),                                       \
579              "dmi" ((USItype)(v)))
580 #define UMUL_TIME 45
581 #define udiv_qrnnd(q, r, n1, n0, d) \
582   __asm__ ("divu%.l %4,%1:%0"                                           \
583            : "=d" ((USItype)(q)),                                       \
584              "=d" ((USItype)(r))                                        \
585            : "0" ((USItype)(n0)),                                       \
586              "1" ((USItype)(n1)),                                       \
587              "dmi" ((USItype)(d)))
588 #define UDIV_TIME 90
589 #define sdiv_qrnnd(q, r, n1, n0, d) \
590   __asm__ ("divs%.l %4,%1:%0"                                           \
591            : "=d" ((USItype)(q)),                                       \
592              "=d" ((USItype)(r))                                        \
593            : "0" ((USItype)(n0)),                                       \
594              "1" ((USItype)(n1)),                                       \
595              "dmi" ((USItype)(d)))
596 #define count_leading_zeros(count, x) \
597   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
598            : "=d" ((USItype)(count))                                    \
599            : "od" ((USItype)(x)), "n" (0))
600 #define COUNT_LEADING_ZEROS_0 32
601 #else /* not mc68020 */
602 #define umul_ppmm(xh, xl, a, b) \
603   do { USItype __umul_tmp1, __umul_tmp2;                                \
604         __asm__ ("| Inlined umul_ppmm
605         move%.l %5,%3
606         move%.l %2,%0
607         move%.w %3,%1
608         swap    %3
609         swap    %0
610         mulu    %2,%1
611         mulu    %3,%0
612         mulu    %2,%3
613         swap    %2
614         mulu    %5,%2
615         add%.l  %3,%2
616         jcc     1f
617         add%.l  %#0x10000,%0
618 1:      move%.l %2,%3
619         clr%.w  %2
620         swap    %2
621         swap    %3
622         clr%.w  %3
623         add%.l  %3,%1
624         addx%.l %2,%0
625         | End inlined umul_ppmm"                                        \
626               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
627                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
628               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
629   } while (0)
630 #define UMUL_TIME 100
631 #define UDIV_TIME 400
632 #endif /* not mc68020 */
633 #endif /* mc68000 */
634
635
636 /***************************************
637  **************  88000  ****************
638  ***************************************/
639 #if defined (__m88000__) && W_TYPE_SIZE == 32
640 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
641   __asm__ ("addu.co %1,%r4,%r5
642         addu.ci %0,%r2,%r3"                                             \
643            : "=r" ((USItype)(sh)),                                      \
644              "=&r" ((USItype)(sl))                                      \
645            : "%rJ" ((USItype)(ah)),                                     \
646              "rJ" ((USItype)(bh)),                                      \
647              "%rJ" ((USItype)(al)),                                     \
648              "rJ" ((USItype)(bl)))
649 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
650   __asm__ ("subu.co %1,%r4,%r5
651         subu.ci %0,%r2,%r3"                                             \
652            : "=r" ((USItype)(sh)),                                      \
653              "=&r" ((USItype)(sl))                                      \
654            : "rJ" ((USItype)(ah)),                                      \
655              "rJ" ((USItype)(bh)),                                      \
656              "rJ" ((USItype)(al)),                                      \
657              "rJ" ((USItype)(bl)))
658 #define count_leading_zeros(count, x) \
659   do {                                                                  \
660     USItype __cbtmp;                                                    \
661     __asm__ ("ff1 %0,%1"                                                \
662              : "=r" (__cbtmp)                                           \
663              : "r" ((USItype)(x)));                                     \
664     (count) = __cbtmp ^ 31;                                             \
665   } while (0)
666 #define COUNT_LEADING_ZEROS_0 63 /* sic */
667 #if defined (__m88110__)
668 #define umul_ppmm(wh, wl, u, v) \
669   do {                                                                  \
670     union {UDItype __ll;                                                \
671            struct {USItype __h, __l;} __i;                              \
672           } __x;                                                        \
673     __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v));   \
674     (wh) = __x.__i.__h;                                                 \
675     (wl) = __x.__i.__l;                                                 \
676   } while (0)
677 #define udiv_qrnnd(q, r, n1, n0, d) \
678   ({union {UDItype __ll;                                                \
679            struct {USItype __h, __l;} __i;                              \
680           } __x, __q;                                                   \
681   __x.__i.__h = (n1); __x.__i.__l = (n0);                               \
682   __asm__ ("divu.d %0,%1,%2"                                            \
683            : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d));                \
684   (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
685 #define UMUL_TIME 5
686 #define UDIV_TIME 25
687 #else
688 #define UMUL_TIME 17
689 #define UDIV_TIME 150
690 #endif /* __m88110__ */
691 #endif /* __m88000__ */
692
693
694 /***************************************
695  **************  MIPS  *****************
696  ***************************************/
697 #if defined (__mips__) && W_TYPE_SIZE == 32
698 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
699 #define umul_ppmm(w1, w0, u, v) \
700   __asm__ ("multu %2,%3"                                                \
701            : "=l" ((USItype)(w0)),                                      \
702              "=h" ((USItype)(w1))                                       \
703            : "d" ((USItype)(u)),                                        \
704              "d" ((USItype)(v)))
705 #else
706 #define umul_ppmm(w1, w0, u, v) \
707   __asm__ ("multu %2,%3
708         mflo %0
709         mfhi %1"                                                        \
710            : "=d" ((USItype)(w0)),                                      \
711              "=d" ((USItype)(w1))                                       \
712            : "d" ((USItype)(u)),                                        \
713              "d" ((USItype)(v)))
714 #endif
715 #define UMUL_TIME 10
716 #define UDIV_TIME 100
717 #endif /* __mips__ */
718
719 /***************************************
720  **************  MIPS/64  **************
721  ***************************************/
722 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
723 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
724 #define umul_ppmm(w1, w0, u, v) \
725   __asm__ ("dmultu %2,%3"                                               \
726            : "=l" ((UDItype)(w0)),                                      \
727              "=h" ((UDItype)(w1))                                       \
728            : "d" ((UDItype)(u)),                                        \
729              "d" ((UDItype)(v)))
730 #else
731 #define umul_ppmm(w1, w0, u, v) \
732   __asm__ ("dmultu %2,%3
733         mflo %0
734         mfhi %1"                                                        \
735            : "=d" ((UDItype)(w0)),                                      \
736              "=d" ((UDItype)(w1))                                       \
737            : "d" ((UDItype)(u)),                                        \
738              "d" ((UDItype)(v)))
739 #endif
740 #define UMUL_TIME 20
741 #define UDIV_TIME 140
742 #endif /* __mips__ */
743
744
745 /***************************************
746  **************  32000  ****************
747  ***************************************/
748 #if defined (__ns32000__) && W_TYPE_SIZE == 32
749 #define umul_ppmm(w1, w0, u, v) \
750   ({union {UDItype __ll;                                                \
751            struct {USItype __l, __h;} __i;                              \
752           } __xx;                                                       \
753   __asm__ ("meid %2,%0"                                                 \
754            : "=g" (__xx.__ll)                                           \
755            : "%0" ((USItype)(u)),                                       \
756              "g" ((USItype)(v)));                                       \
757   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
758 #define __umulsidi3(u, v) \
759   ({UDItype __w;                                                        \
760     __asm__ ("meid %2,%0"                                               \
761              : "=g" (__w)                                               \
762              : "%0" ((USItype)(u)),                                     \
763                "g" ((USItype)(v)));                                     \
764     __w; })
765 #define udiv_qrnnd(q, r, n1, n0, d) \
766   ({union {UDItype __ll;                                                \
767            struct {USItype __l, __h;} __i;                              \
768           } __xx;                                                       \
769   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
770   __asm__ ("deid %2,%0"                                                 \
771            : "=g" (__xx.__ll)                                           \
772            : "0" (__xx.__ll),                                           \
773              "g" ((USItype)(d)));                                       \
774   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
775 #define count_trailing_zeros(count,x) \
776   do {
777     __asm__ ("ffsd      %2,%0"                                          \
778              : "=r" ((USItype) (count))                                 \
779              : "0" ((USItype) 0),                                       \
780                "r" ((USItype) (x)));                                    \
781   } while (0)
782 #endif /* __ns32000__ */
783
784
785 /***************************************
786  **************  PPC  ******************
787  ***************************************/
788 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
789 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
790   do {                                                                  \
791     if (__builtin_constant_p (bh) && (bh) == 0)                         \
792       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
793              : "=r" ((USItype)(sh)),                                    \
794                "=&r" ((USItype)(sl))                                    \
795              : "%r" ((USItype)(ah)),                                    \
796                "%r" ((USItype)(al)),                                    \
797                "rI" ((USItype)(bl)));                                   \
798     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
799       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
800              : "=r" ((USItype)(sh)),                                    \
801                "=&r" ((USItype)(sl))                                    \
802              : "%r" ((USItype)(ah)),                                    \
803                "%r" ((USItype)(al)),                                    \
804                "rI" ((USItype)(bl)));                                   \
805     else                                                                \
806       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
807              : "=r" ((USItype)(sh)),                                    \
808                "=&r" ((USItype)(sl))                                    \
809              : "%r" ((USItype)(ah)),                                    \
810                "r" ((USItype)(bh)),                                     \
811                "%r" ((USItype)(al)),                                    \
812                "rI" ((USItype)(bl)));                                   \
813   } while (0)
814 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
815   do {                                                                  \
816     if (__builtin_constant_p (ah) && (ah) == 0)                         \
817       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
818                : "=r" ((USItype)(sh)),                                  \
819                  "=&r" ((USItype)(sl))                                  \
820                : "r" ((USItype)(bh)),                                   \
821                  "rI" ((USItype)(al)),                                  \
822                  "r" ((USItype)(bl)));                                  \
823     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
824       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
825                : "=r" ((USItype)(sh)),                                  \
826                  "=&r" ((USItype)(sl))                                  \
827                : "r" ((USItype)(bh)),                                   \
828                  "rI" ((USItype)(al)),                                  \
829                  "r" ((USItype)(bl)));                                  \
830     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
831       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
832                : "=r" ((USItype)(sh)),                                  \
833                  "=&r" ((USItype)(sl))                                  \
834                : "r" ((USItype)(ah)),                                   \
835                  "rI" ((USItype)(al)),                                  \
836                  "r" ((USItype)(bl)));                                  \
837     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
838       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
839                : "=r" ((USItype)(sh)),                                  \
840                  "=&r" ((USItype)(sl))                                  \
841                : "r" ((USItype)(ah)),                                   \
842                  "rI" ((USItype)(al)),                                  \
843                  "r" ((USItype)(bl)));                                  \
844     else                                                                \
845       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
846                : "=r" ((USItype)(sh)),                                  \
847                  "=&r" ((USItype)(sl))                                  \
848                : "r" ((USItype)(ah)),                                   \
849                  "r" ((USItype)(bh)),                                   \
850                  "rI" ((USItype)(al)),                                  \
851                  "r" ((USItype)(bl)));                                  \
852   } while (0)
853 #define count_leading_zeros(count, x) \
854   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
855            : "=r" ((USItype)(count))                                    \
856            : "r" ((USItype)(x)))
857 #define COUNT_LEADING_ZEROS_0 32
858 #if defined (_ARCH_PPC)
859 #define umul_ppmm(ph, pl, m0, m1) \
860   do {                                                                  \
861     USItype __m0 = (m0), __m1 = (m1);                                   \
862     __asm__ ("mulhwu %0,%1,%2"                                          \
863              : "=r" ((USItype) ph)                                      \
864              : "%r" (__m0),                                             \
865                "r" (__m1));                                             \
866     (pl) = __m0 * __m1;                                                 \
867   } while (0)
868 #define UMUL_TIME 15
869 #define smul_ppmm(ph, pl, m0, m1) \
870   do {                                                                  \
871     SItype __m0 = (m0), __m1 = (m1);                                    \
872     __asm__ ("mulhw %0,%1,%2"                                           \
873              : "=r" ((SItype) ph)                                       \
874              : "%r" (__m0),                                             \
875                "r" (__m1));                                             \
876     (pl) = __m0 * __m1;                                                 \
877   } while (0)
878 #define SMUL_TIME 14
879 #define UDIV_TIME 120
880 #else
881 #define umul_ppmm(xh, xl, m0, m1) \
882   do {                                                                  \
883     USItype __m0 = (m0), __m1 = (m1);                                   \
884     __asm__ ("mul %0,%2,%3"                                             \
885              : "=r" ((USItype)(xh)),                                    \
886                "=q" ((USItype)(xl))                                     \
887              : "r" (__m0),                                              \
888                "r" (__m1));                                             \
889     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
890              + (((SItype) __m1 >> 31) & __m0));                         \
891   } while (0)
892 #define UMUL_TIME 8
893 #define smul_ppmm(xh, xl, m0, m1) \
894   __asm__ ("mul %0,%2,%3"                                               \
895            : "=r" ((SItype)(xh)),                                       \
896              "=q" ((SItype)(xl))                                        \
897            : "r" (m0),                                                  \
898              "r" (m1))
899 #define SMUL_TIME 4
900 #define sdiv_qrnnd(q, r, nh, nl, d) \
901   __asm__ ("div %0,%2,%4"                                               \
902            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
903            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
904 #define UDIV_TIME 100
905 #endif
906 #endif /* Power architecture variants.  */
907
908
909 /***************************************
910  **************  PYR  ******************
911  ***************************************/
912 #if defined (__pyr__) && W_TYPE_SIZE == 32
913 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
914   __asm__ ("addw        %5,%1
915         addwc   %3,%0"                                                  \
916            : "=r" ((USItype)(sh)),                                      \
917              "=&r" ((USItype)(sl))                                      \
918            : "%0" ((USItype)(ah)),                                      \
919              "g" ((USItype)(bh)),                                       \
920              "%1" ((USItype)(al)),                                      \
921              "g" ((USItype)(bl)))
922 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
923   __asm__ ("subw        %5,%1
924         subwb   %3,%0"                                                  \
925            : "=r" ((USItype)(sh)),                                      \
926              "=&r" ((USItype)(sl))                                      \
927            : "0" ((USItype)(ah)),                                       \
928              "g" ((USItype)(bh)),                                       \
929              "1" ((USItype)(al)),                                       \
930              "g" ((USItype)(bl)))
931 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
932 #define umul_ppmm(w1, w0, u, v) \
933   ({union {UDItype __ll;                                                \
934            struct {USItype __h, __l;} __i;                              \
935           } __xx;                                                       \
936   __asm__ ("movw %1,%R0
937         uemul %2,%0"                                                    \
938            : "=&r" (__xx.__ll)                                          \
939            : "g" ((USItype) (u)),                                       \
940              "g" ((USItype)(v)));                                       \
941   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
942 #endif /* __pyr__ */
943
944
945 /***************************************
946  **************  RT/ROMP  **************
947  ***************************************/
948 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
949 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
950   __asm__ ("a %1,%5
951         ae %0,%3"                                                       \
952            : "=r" ((USItype)(sh)),                                      \
953              "=&r" ((USItype)(sl))                                      \
954            : "%0" ((USItype)(ah)),                                      \
955              "r" ((USItype)(bh)),                                       \
956              "%1" ((USItype)(al)),                                      \
957              "r" ((USItype)(bl)))
958 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
959   __asm__ ("s %1,%5
960         se %0,%3"                                                       \
961            : "=r" ((USItype)(sh)),                                      \
962              "=&r" ((USItype)(sl))                                      \
963            : "0" ((USItype)(ah)),                                       \
964              "r" ((USItype)(bh)),                                       \
965              "1" ((USItype)(al)),                                       \
966              "r" ((USItype)(bl)))
967 #define umul_ppmm(ph, pl, m0, m1) \
968   do {                                                                  \
969     USItype __m0 = (m0), __m1 = (m1);                                   \
970     __asm__ (                                                           \
971        "s       r2,r2
972         mts     r10,%2
973         m       r2,%3
974         m       r2,%3
975         m       r2,%3
976         m       r2,%3
977         m       r2,%3
978         m       r2,%3
979         m       r2,%3
980         m       r2,%3
981         m       r2,%3
982         m       r2,%3
983         m       r2,%3
984         m       r2,%3
985         m       r2,%3
986         m       r2,%3
987         m       r2,%3
988         m       r2,%3
989         cas     %0,r2,r0
990         mfs     r10,%1"                                                 \
991              : "=r" ((USItype)(ph)),                                    \
992                "=r" ((USItype)(pl))                                     \
993              : "%r" (__m0),                                             \
994                 "r" (__m1)                                              \
995              : "r2");                                                   \
996     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
997              + (((SItype) __m1 >> 31) & __m0));                         \
998   } while (0)
999 #define UMUL_TIME 20
1000 #define UDIV_TIME 200
1001 #define count_leading_zeros(count, x) \
1002   do {                                                                  \
1003     if ((x) >= 0x10000)                                                 \
1004       __asm__ ("clz     %0,%1"                                          \
1005                : "=r" ((USItype)(count))                                \
1006                : "r" ((USItype)(x) >> 16));                             \
1007     else                                                                \
1008       {                                                                 \
1009         __asm__ ("clz   %0,%1"                                          \
1010                  : "=r" ((USItype)(count))                              \
1011                  : "r" ((USItype)(x)));                                 \
1012         (count) += 16;                                                  \
1013       }                                                                 \
1014   } while (0)
1015 #endif /* RT/ROMP */
1016
1017
1018 /***************************************
1019  **************  SH2  ******************
1020  ***************************************/
1021 #if defined (__sh2__) && W_TYPE_SIZE == 32
1022 #define umul_ppmm(w1, w0, u, v) \
1023   __asm__ (                                                             \
1024        "dmulu.l %2,%3
1025         sts     macl,%1
1026         sts     mach,%0"                                                \
1027            : "=r" ((USItype)(w1)),                                      \
1028              "=r" ((USItype)(w0))                                       \
1029            : "r" ((USItype)(u)),                                        \
1030              "r" ((USItype)(v))                                         \
1031            : "macl", "mach")
1032 #define UMUL_TIME 5
1033 #endif
1034
1035 /***************************************
1036  **************  SPARC  ****************
1037  ***************************************/
1038 #if defined (__sparc__) && W_TYPE_SIZE == 32
1039 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1040   __asm__ ("addcc %r4,%5,%1
1041         addx %r2,%3,%0"                                                 \
1042            : "=r" ((USItype)(sh)),                                      \
1043              "=&r" ((USItype)(sl))                                      \
1044            : "%rJ" ((USItype)(ah)),                                     \
1045              "rI" ((USItype)(bh)),                                      \
1046              "%rJ" ((USItype)(al)),                                     \
1047              "rI" ((USItype)(bl))                                       \
1048            __CLOBBER_CC)
1049 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1050   __asm__ ("subcc %r4,%5,%1
1051         subx %r2,%3,%0"                                                 \
1052            : "=r" ((USItype)(sh)),                                      \
1053              "=&r" ((USItype)(sl))                                      \
1054            : "rJ" ((USItype)(ah)),                                      \
1055              "rI" ((USItype)(bh)),                                      \
1056              "rJ" ((USItype)(al)),                                      \
1057              "rI" ((USItype)(bl))                                       \
1058            __CLOBBER_CC)
1059 #if defined (__sparc_v8__)
1060 /* Don't match immediate range because, 1) it is not often useful,
1061    2) the 'I' flag thinks of the range as a 13 bit signed interval,
1062    while we want to match a 13 bit interval, sign extended to 32 bits,
1063    but INTERPRETED AS UNSIGNED.  */
1064 #define umul_ppmm(w1, w0, u, v) \
1065   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1066            : "=r" ((USItype)(w1)),                                      \
1067              "=r" ((USItype)(w0))                                       \
1068            : "r" ((USItype)(u)),                                        \
1069              "r" ((USItype)(v)))
1070 #define UMUL_TIME 5
1071 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
1072 #define udiv_qrnnd(q, r, n1, n0, d) \
1073   do {                                                                  \
1074     USItype __q;                                                        \
1075     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1076              : "=r" ((USItype)(__q))                                    \
1077              : "r" ((USItype)(n1)),                                     \
1078                "r" ((USItype)(n0)),                                     \
1079                "r" ((USItype)(d)));                                     \
1080     (r) = (n0) - __q * (d);                                             \
1081     (q) = __q;                                                          \
1082   } while (0)
1083 #define UDIV_TIME 25
1084 #endif /* SUPERSPARC */
1085 #else /* ! __sparc_v8__ */
1086 #if defined (__sparclite__)
1087 /* This has hardware multiply but not divide.  It also has two additional
1088    instructions scan (ffs from high bit) and divscc.  */
1089 #define umul_ppmm(w1, w0, u, v) \
1090   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1091            : "=r" ((USItype)(w1)),                                      \
1092              "=r" ((USItype)(w0))                                       \
1093            : "r" ((USItype)(u)),                                        \
1094              "r" ((USItype)(v)))
1095 #define UMUL_TIME 5
1096 #define udiv_qrnnd(q, r, n1, n0, d) \
1097   __asm__ ("! Inlined udiv_qrnnd
1098         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
1099         tst     %%g0
1100         divscc  %3,%4,%%g1
1101         divscc  %%g1,%4,%%g1
1102         divscc  %%g1,%4,%%g1
1103         divscc  %%g1,%4,%%g1
1104         divscc  %%g1,%4,%%g1
1105         divscc  %%g1,%4,%%g1
1106         divscc  %%g1,%4,%%g1
1107         divscc  %%g1,%4,%%g1
1108         divscc  %%g1,%4,%%g1
1109         divscc  %%g1,%4,%%g1
1110         divscc  %%g1,%4,%%g1
1111         divscc  %%g1,%4,%%g1
1112         divscc  %%g1,%4,%%g1
1113         divscc  %%g1,%4,%%g1
1114         divscc  %%g1,%4,%%g1
1115         divscc  %%g1,%4,%%g1
1116         divscc  %%g1,%4,%%g1
1117         divscc  %%g1,%4,%%g1
1118         divscc  %%g1,%4,%%g1
1119         divscc  %%g1,%4,%%g1
1120         divscc  %%g1,%4,%%g1
1121         divscc  %%g1,%4,%%g1
1122         divscc  %%g1,%4,%%g1
1123         divscc  %%g1,%4,%%g1
1124         divscc  %%g1,%4,%%g1
1125         divscc  %%g1,%4,%%g1
1126         divscc  %%g1,%4,%%g1
1127         divscc  %%g1,%4,%%g1
1128         divscc  %%g1,%4,%%g1
1129         divscc  %%g1,%4,%%g1
1130         divscc  %%g1,%4,%%g1
1131         divscc  %%g1,%4,%0
1132         rd      %%y,%1
1133         bl,a 1f
1134         add     %1,%4,%1
1135 1:      ! End of inline udiv_qrnnd"                                     \
1136            : "=r" ((USItype)(q)),                                       \
1137              "=r" ((USItype)(r))                                        \
1138            : "r" ((USItype)(n1)),                                       \
1139              "r" ((USItype)(n0)),                                       \
1140              "rI" ((USItype)(d))                                        \
1141            : "%g1" __AND_CLOBBER_CC)
1142 #define UDIV_TIME 37
1143 #define count_leading_zeros(count, x) \
1144   __asm__ ("scan %1,0,%0"                                               \
1145            : "=r" ((USItype)(x))                                        \
1146            : "r" ((USItype)(count)))
1147 /* Early sparclites return 63 for an argument of 0, but they warn that future
1148    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1149    undefined.  */
1150 #endif /* __sparclite__ */
1151 #endif /* __sparc_v8__ */
1152 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1153 #ifndef umul_ppmm
1154 #define umul_ppmm(w1, w0, u, v) \
1155   __asm__ ("! Inlined umul_ppmm
1156         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1157         sra     %3,31,%%g2      ! Don't move this insn
1158         and     %2,%%g2,%%g2    ! Don't move this insn
1159         andcc   %%g0,0,%%g1     ! Don't move this insn
1160         mulscc  %%g1,%3,%%g1
1161         mulscc  %%g1,%3,%%g1
1162         mulscc  %%g1,%3,%%g1
1163         mulscc  %%g1,%3,%%g1
1164         mulscc  %%g1,%3,%%g1
1165         mulscc  %%g1,%3,%%g1
1166         mulscc  %%g1,%3,%%g1
1167         mulscc  %%g1,%3,%%g1
1168         mulscc  %%g1,%3,%%g1
1169         mulscc  %%g1,%3,%%g1
1170         mulscc  %%g1,%3,%%g1
1171         mulscc  %%g1,%3,%%g1
1172         mulscc  %%g1,%3,%%g1
1173         mulscc  %%g1,%3,%%g1
1174         mulscc  %%g1,%3,%%g1
1175         mulscc  %%g1,%3,%%g1
1176         mulscc  %%g1,%3,%%g1
1177         mulscc  %%g1,%3,%%g1
1178         mulscc  %%g1,%3,%%g1
1179         mulscc  %%g1,%3,%%g1
1180         mulscc  %%g1,%3,%%g1
1181         mulscc  %%g1,%3,%%g1
1182         mulscc  %%g1,%3,%%g1
1183         mulscc  %%g1,%3,%%g1
1184         mulscc  %%g1,%3,%%g1
1185         mulscc  %%g1,%3,%%g1
1186         mulscc  %%g1,%3,%%g1
1187         mulscc  %%g1,%3,%%g1
1188         mulscc  %%g1,%3,%%g1
1189         mulscc  %%g1,%3,%%g1
1190         mulscc  %%g1,%3,%%g1
1191         mulscc  %%g1,%3,%%g1
1192         mulscc  %%g1,0,%%g1
1193         add     %%g1,%%g2,%0
1194         rd      %%y,%1"                                                 \
1195            : "=r" ((USItype)(w1)),                                      \
1196              "=r" ((USItype)(w0))                                       \
1197            : "%rI" ((USItype)(u)),                                      \
1198              "r" ((USItype)(v))                                         \
1199            : "%g1", "%g2" __AND_CLOBBER_CC)
1200 #define UMUL_TIME 39            /* 39 instructions */
1201 #endif
1202 #ifndef udiv_qrnnd
1203 #ifndef LONGLONG_STANDALONE
1204 #define udiv_qrnnd(q, r, n1, n0, d) \
1205   do { USItype __r;                                                     \
1206     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
1207     (r) = __r;                                                          \
1208   } while (0)
1209 extern USItype __udiv_qrnnd ();
1210 #define UDIV_TIME 140
1211 #endif /* LONGLONG_STANDALONE */
1212 #endif /* udiv_qrnnd */
1213 #endif /* __sparc__ */
1214
1215
1216 /***************************************
1217  **************  VAX  ******************
1218  ***************************************/
1219 #if defined (__vax__) && W_TYPE_SIZE == 32
1220 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1221   __asm__ ("addl2 %5,%1
1222         adwc %3,%0"                                                     \
1223            : "=g" ((USItype)(sh)),                                      \
1224              "=&g" ((USItype)(sl))                                      \
1225            : "%0" ((USItype)(ah)),                                      \
1226              "g" ((USItype)(bh)),                                       \
1227              "%1" ((USItype)(al)),                                      \
1228              "g" ((USItype)(bl)))
1229 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1230   __asm__ ("subl2 %5,%1
1231         sbwc %3,%0"                                                     \
1232            : "=g" ((USItype)(sh)),                                      \
1233              "=&g" ((USItype)(sl))                                      \
1234            : "0" ((USItype)(ah)),                                       \
1235              "g" ((USItype)(bh)),                                       \
1236              "1" ((USItype)(al)),                                       \
1237              "g" ((USItype)(bl)))
1238 #define umul_ppmm(xh, xl, m0, m1) \
1239   do {                                                                  \
1240     union {UDItype __ll;                                                \
1241            struct {USItype __l, __h;} __i;                              \
1242           } __xx;                                                       \
1243     USItype __m0 = (m0), __m1 = (m1);                                   \
1244     __asm__ ("emul %1,%2,$0,%0"                                         \
1245              : "=g" (__xx.__ll)                                         \
1246              : "g" (__m0),                                              \
1247                "g" (__m1));                                             \
1248     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1249     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1250              + (((SItype) __m1 >> 31) & __m0));                         \
1251   } while (0)
1252 #define sdiv_qrnnd(q, r, n1, n0, d) \
1253   do {                                                                  \
1254     union {DItype __ll;                                                 \
1255            struct {SItype __l, __h;} __i;                               \
1256           } __xx;                                                       \
1257     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1258     __asm__ ("ediv %3,%2,%0,%1"                                         \
1259              : "=g" (q), "=g" (r)                                       \
1260              : "g" (__xx.__ll), "g" (d));                               \
1261   } while (0)
1262 #endif /* __vax__ */
1263
1264
1265 /***************************************
1266  **************  Z8000  ****************
1267  ***************************************/
1268 #if defined (__z8000__) && W_TYPE_SIZE == 16
1269 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1270   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1271            : "=r" ((unsigned int)(sh)),                                 \
1272              "=&r" ((unsigned int)(sl))                                 \
1273            : "%0" ((unsigned int)(ah)),                                 \
1274              "r" ((unsigned int)(bh)),                                  \
1275              "%1" ((unsigned int)(al)),                                 \
1276              "rQR" ((unsigned int)(bl)))
1277 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1278   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1279            : "=r" ((unsigned int)(sh)),                                 \
1280              "=&r" ((unsigned int)(sl))                                 \
1281            : "0" ((unsigned int)(ah)),                                  \
1282              "r" ((unsigned int)(bh)),                                  \
1283              "1" ((unsigned int)(al)),                                  \
1284              "rQR" ((unsigned int)(bl)))
1285 #define umul_ppmm(xh, xl, m0, m1) \
1286   do {                                                                  \
1287     union {long int __ll;                                               \
1288            struct {unsigned int __h, __l;} __i;                         \
1289           } __xx;                                                       \
1290     unsigned int __m0 = (m0), __m1 = (m1);                              \
1291     __asm__ ("mult      %S0,%H3"                                        \
1292              : "=r" (__xx.__i.__h),                                     \
1293                "=r" (__xx.__i.__l)                                      \
1294              : "%1" (__m0),                                             \
1295                "rQR" (__m1));                                           \
1296     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1297     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1298              + (((signed int) __m1 >> 15) & __m0));                     \
1299   } while (0)
1300 #endif /* __z8000__ */
1301
1302 #endif /* __GNUC__ */
1303
1304
1305 /***************************************
1306  ***********  Generic Versions  ********
1307  ***************************************/
1308 #if !defined (umul_ppmm) && defined (__umulsidi3)
1309 #define umul_ppmm(ph, pl, m0, m1) \
1310   {                                                                     \
1311     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1312     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1313     pl = (UWtype) __ll;                                                 \
1314   }
1315 #endif
1316
1317 #if !defined (__umulsidi3)
1318 #define __umulsidi3(u, v) \
1319   ({UWtype __hi, __lo;                                                  \
1320     umul_ppmm (__hi, __lo, u, v);                                       \
1321     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1322 #endif
1323
1324 /* If this machine has no inline assembler, use C macros.  */
1325
1326 #if !defined (add_ssaaaa)
1327 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1328   do {                                                                  \
1329     UWtype __x;                                                         \
1330     __x = (al) + (bl);                                                  \
1331     (sh) = (ah) + (bh) + (__x < (al));                                  \
1332     (sl) = __x;                                                         \
1333   } while (0)
1334 #endif
1335
1336 #if !defined (sub_ddmmss)
1337 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1338   do {                                                                  \
1339     UWtype __x;                                                         \
1340     __x = (al) - (bl);                                                  \
1341     (sh) = (ah) - (bh) - (__x > (al));                                  \
1342     (sl) = __x;                                                         \
1343   } while (0)
1344 #endif
1345
1346 #if !defined (umul_ppmm)
1347 #define umul_ppmm(w1, w0, u, v)                                         \
1348   do {                                                                  \
1349     UWtype __x0, __x1, __x2, __x3;                                      \
1350     UHWtype __ul, __vl, __uh, __vh;                                     \
1351     UWtype __u = (u), __v = (v);                                        \
1352                                                                         \
1353     __ul = __ll_lowpart (__u);                                          \
1354     __uh = __ll_highpart (__u);                                         \
1355     __vl = __ll_lowpart (__v);                                          \
1356     __vh = __ll_highpart (__v);                                         \
1357                                                                         \
1358     __x0 = (UWtype) __ul * __vl;                                        \
1359     __x1 = (UWtype) __ul * __vh;                                        \
1360     __x2 = (UWtype) __uh * __vl;                                        \
1361     __x3 = (UWtype) __uh * __vh;                                        \
1362                                                                         \
1363     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1364     __x1 += __x2;               /* but this indeed can */               \
1365     if (__x1 < __x2)            /* did we get it? */                    \
1366       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1367                                                                         \
1368     (w1) = __x3 + __ll_highpart (__x1);                                 \
1369     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1370   } while (0)
1371 #endif
1372
1373 #if !defined (umul_ppmm)
1374 #define smul_ppmm(w1, w0, u, v)                                         \
1375   do {                                                                  \
1376     UWtype __w1;                                                        \
1377     UWtype __m0 = (u), __m1 = (v);                                      \
1378     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1379     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1380                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1381   } while (0)
1382 #endif
1383
1384 /* Define this unconditionally, so it can be used for debugging.  */
1385 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1386   do {                                                                  \
1387     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1388     __d1 = __ll_highpart (d);                                           \
1389     __d0 = __ll_lowpart (d);                                            \
1390                                                                         \
1391     __r1 = (n1) % __d1;                                                 \
1392     __q1 = (n1) / __d1;                                                 \
1393     __m = (UWtype) __q1 * __d0;                                         \
1394     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1395     if (__r1 < __m)                                                     \
1396       {                                                                 \
1397         __q1--, __r1 += (d);                                            \
1398         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1399           if (__r1 < __m)                                               \
1400             __q1--, __r1 += (d);                                        \
1401       }                                                                 \
1402     __r1 -= __m;                                                        \
1403                                                                         \
1404     __r0 = __r1 % __d1;                                                 \
1405     __q0 = __r1 / __d1;                                                 \
1406     __m = (UWtype) __q0 * __d0;                                         \
1407     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1408     if (__r0 < __m)                                                     \
1409       {                                                                 \
1410         __q0--, __r0 += (d);                                            \
1411         if (__r0 >= (d))                                                \
1412           if (__r0 < __m)                                               \
1413             __q0--, __r0 += (d);                                        \
1414       }                                                                 \
1415     __r0 -= __m;                                                        \
1416                                                                         \
1417     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1418     (r) = __r0;                                                         \
1419   } while (0)
1420
1421 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1422    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1423 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1424 #define udiv_qrnnd(q, r, nh, nl, d) \
1425   do {                                                                  \
1426     UWtype __r;                                                         \
1427     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1428     (r) = __r;                                                          \
1429   } while (0)
1430 #endif
1431
1432 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1433 #if !defined (udiv_qrnnd)
1434 #define UDIV_NEEDS_NORMALIZATION 1
1435 #define udiv_qrnnd __udiv_qrnnd_c
1436 #endif
1437
1438 #if !defined (count_leading_zeros)
1439 extern
1440 #ifdef __STDC__
1441 const
1442 #endif
1443 unsigned char __clz_tab[];
1444 #define MPI_INTERNAL_NEED_CLZ_TAB 1
1445 #define count_leading_zeros(count, x) \
1446   do {                                                                  \
1447     UWtype __xr = (x);                                                  \
1448     UWtype __a;                                                         \
1449                                                                         \
1450     if (W_TYPE_SIZE <= 32)                                              \
1451       {                                                                 \
1452         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1453           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1454           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1455       }                                                                 \
1456     else                                                                \
1457       {                                                                 \
1458         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1459           if (((__xr >> __a) & 0xff) != 0)                              \
1460             break;                                                      \
1461       }                                                                 \
1462                                                                         \
1463     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1464   } while (0)
1465 /* This version gives a well-defined value for zero. */
1466 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1467 #endif
1468
1469 #if !defined (count_trailing_zeros)
1470 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1471    defined in asm, but if it is not, the C version above is good enough.  */
1472 #define count_trailing_zeros(count, x) \
1473   do {                                                                  \
1474     UWtype __ctz_x = (x);                                               \
1475     UWtype __ctz_c;                                                     \
1476     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1477     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1478   } while (0)
1479 #endif
1480
1481 #ifndef UDIV_NEEDS_NORMALIZATION
1482 #define UDIV_NEEDS_NORMALIZATION 0
1483 #endif