Output armor works, RSA keygen works.
[gnupg.git] / mpi / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2
3 Copyright (C) 1991, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
4
5 This file is free software; you can redistribute it and/or modify
6 it under the terms of the GNU Library General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or (at your
8 option) any later version.
9
10 This file is distributed in the hope that it will be useful, but
11 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
13 License for more details.
14
15 You should have received a copy of the GNU Library General Public License
16 along with this file; see the file COPYING.LIB.  If not, write to
17 the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 MA 02111-1307, USA. */
19
20 /* You have to define the following before including this file:
21
22    UWtype -- An unsigned type, default type for operations (typically a "word")
23    UHWtype -- An unsigned type, at least half the size of UWtype.
24    UDWtype -- An unsigned type, at least twice as large a UWtype
25    W_TYPE_SIZE -- size in bits of UWtype
26
27    SItype, USItype -- Signed and unsigned 32 bit types.
28    DItype, UDItype -- Signed and unsigned 64 bit types.
29
30    On a 32 bit machine UWtype should typically be USItype;
31    on a 64 bit machine, UWtype should typically be UDItype.
32 */
33
34 #define __BITS4 (W_TYPE_SIZE / 4)
35 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
36 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
37 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
38
39 /* This is used to make sure no undesirable sharing between different libraries
40    that use this file takes place.  */
41 #ifndef __MPN
42 #define __MPN(x) __##x
43 #endif
44
45 /* Define auxiliary asm macros.
46
47    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
48    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
49    word product in HIGH_PROD and LOW_PROD.
50
51    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
52    UDWtype product.  This is just a variant of umul_ppmm.
53
54    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
55    denominator) divides a UDWtype, composed by the UWtype integers
56    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
57    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
58    than DENOMINATOR for correct operation.  If, in addition, the most
59    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
60    UDIV_NEEDS_NORMALIZATION is defined to 1.
61
62    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
63    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
64    is rounded towards 0.
65
66    5) count_leading_zeros(count, x) counts the number of zero-bits from the
67    msb to the first non-zero bit in the UWtype X.  This is the number of
68    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
69    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
70
71    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
72    from the least significant end.
73
74    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
75    high_addend_2, low_addend_2) adds two UWtype integers, composed by
76    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
77    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
78    (i.e. carry out) is not stored anywhere, and is lost.
79
80    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
81    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
82    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
83    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
84    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
85    and is lost.
86
87    If any of these macros are left undefined for a particular CPU,
88    C macros are used.  */
89
90 /* The CPUs come in alphabetical order below.
91
92    Please add support for more CPUs here, or improve the current support
93    for the CPUs below!  */
94
95 #if defined (__GNUC__) && !defined (NO_ASM)
96
97 /* We sometimes need to clobber "cc" with gcc2, but that would not be
98    understood by gcc1.  Use cpp to avoid major code duplication.  */
99 #if __GNUC__ < 2
100 #define __CLOBBER_CC
101 #define __AND_CLOBBER_CC
102 #else /* __GNUC__ >= 2 */
103 #define __CLOBBER_CC : "cc"
104 #define __AND_CLOBBER_CC , "cc"
105 #endif /* __GNUC__ < 2 */
106
107 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
108 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
109   __asm__ ("add %1,%4,%5
110         addc %0,%2,%3"                                                  \
111            : "=r" ((USItype)(sh)),                                      \
112             "=&r" ((USItype)(sl))                                       \
113            : "%r" ((USItype)(ah)),                                      \
114              "rI" ((USItype)(bh)),                                      \
115              "%r" ((USItype)(al)),                                      \
116              "rI" ((USItype)(bl)))
117 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
118   __asm__ ("sub %1,%4,%5
119         subc %0,%2,%3"                                                  \
120            : "=r" ((USItype)(sh)),                                      \
121              "=&r" ((USItype)(sl))                                      \
122            : "r" ((USItype)(ah)),                                       \
123              "rI" ((USItype)(bh)),                                      \
124              "r" ((USItype)(al)),                                       \
125              "rI" ((USItype)(bl)))
126 #define umul_ppmm(xh, xl, m0, m1) \
127   do {                                                                  \
128     USItype __m0 = (m0), __m1 = (m1);                                   \
129     __asm__ ("multiplu %0,%1,%2"                                        \
130              : "=r" ((USItype)(xl))                                     \
131              : "r" (__m0),                                              \
132                "r" (__m1));                                             \
133     __asm__ ("multmu %0,%1,%2"                                          \
134              : "=r" ((USItype)(xh))                                     \
135              : "r" (__m0),                                              \
136                "r" (__m1));                                             \
137   } while (0)
138 #define udiv_qrnnd(q, r, n1, n0, d) \
139   __asm__ ("dividu %0,%3,%4"                                            \
140            : "=r" ((USItype)(q)),                                       \
141              "=q" ((USItype)(r))                                        \
142            : "1" ((USItype)(n1)),                                       \
143              "r" ((USItype)(n0)),                                       \
144              "r" ((USItype)(d)))
145 #define count_leading_zeros(count, x) \
146     __asm__ ("clz %0,%1"                                                \
147              : "=r" ((USItype)(count))                                  \
148              : "r" ((USItype)(x)))
149 #define COUNT_LEADING_ZEROS_0 32
150 #endif /* __a29k__ */
151
152 #if defined (__alpha) && W_TYPE_SIZE == 64
153 #define umul_ppmm(ph, pl, m0, m1) \
154   do {                                                                  \
155     UDItype __m0 = (m0), __m1 = (m1);                                   \
156     __asm__ ("umulh %r1,%2,%0"                                          \
157              : "=r" ((UDItype) ph)                                      \
158              : "%rJ" (__m0),                                            \
159                "rI" (__m1));                                            \
160     (pl) = __m0 * __m1;                                                 \
161   } while (0)
162 #define UMUL_TIME 46
163 #ifndef LONGLONG_STANDALONE
164 #define udiv_qrnnd(q, r, n1, n0, d) \
165   do { UDItype __r;                                                     \
166     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
167     (r) = __r;                                                          \
168   } while (0)
169 extern UDItype __udiv_qrnnd ();
170 #define UDIV_TIME 220
171 #endif /* LONGLONG_STANDALONE */
172 #endif /* __alpha */
173
174 #if defined (__arm__) && W_TYPE_SIZE == 32
175 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
176   __asm__ ("adds        %1, %4, %5
177         adc     %0, %2, %3"                                             \
178            : "=r" ((USItype)(sh)),                                      \
179              "=&r" ((USItype)(sl))                                      \
180            : "%r" ((USItype)(ah)),                                      \
181              "rI" ((USItype)(bh)),                                      \
182              "%r" ((USItype)(al)),                                      \
183              "rI" ((USItype)(bl)))
184 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
185   __asm__ ("subs        %1, %4, %5
186         sbc     %0, %2, %3"                                             \
187            : "=r" ((USItype)(sh)),                                      \
188              "=&r" ((USItype)(sl))                                      \
189            : "r" ((USItype)(ah)),                                       \
190              "rI" ((USItype)(bh)),                                      \
191              "r" ((USItype)(al)),                                       \
192              "rI" ((USItype)(bl)))
193 #define umul_ppmm(xh, xl, a, b) \
194   __asm__ ("%@ Inlined umul_ppmm
195         mov     %|r0, %2, lsr #16
196         mov     %|r2, %3, lsr #16
197         bic     %|r1, %2, %|r0, lsl #16
198         bic     %|r2, %3, %|r2, lsl #16
199         mul     %1, %|r1, %|r2
200         mul     %|r2, %|r0, %|r2
201         mul     %|r1, %0, %|r1
202         mul     %0, %|r0, %0
203         adds    %|r1, %|r2, %|r1
204         addcs   %0, %0, #65536
205         adds    %1, %1, %|r1, lsl #16
206         adc     %0, %0, %|r1, lsr #16"                                  \
207            : "=&r" ((USItype)(xh)),                                     \
208              "=r" ((USItype)(xl))                                       \
209            : "r" ((USItype)(a)),                                        \
210              "r" ((USItype)(b))                                         \
211            : "r0", "r1", "r2")
212 #define UMUL_TIME 20
213 #define UDIV_TIME 100
214 #endif /* __arm__ */
215
216 #if defined (__clipper__) && W_TYPE_SIZE == 32
217 #define umul_ppmm(w1, w0, u, v) \
218   ({union {UDItype __ll;                                                \
219            struct {USItype __l, __h;} __i;                              \
220           } __xx;                                                       \
221   __asm__ ("mulwux %2,%0"                                               \
222            : "=r" (__xx.__ll)                                           \
223            : "%0" ((USItype)(u)),                                       \
224              "r" ((USItype)(v)));                                       \
225   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
226 #define smul_ppmm(w1, w0, u, v) \
227   ({union {DItype __ll;                                                 \
228            struct {SItype __l, __h;} __i;                               \
229           } __xx;                                                       \
230   __asm__ ("mulwx %2,%0"                                                \
231            : "=r" (__xx.__ll)                                           \
232            : "%0" ((SItype)(u)),                                        \
233              "r" ((SItype)(v)));                                        \
234   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
235 #define __umulsidi3(u, v) \
236   ({UDItype __w;                                                        \
237     __asm__ ("mulwux %2,%0"                                             \
238              : "=r" (__w)                                               \
239              : "%0" ((USItype)(u)),                                     \
240                "r" ((USItype)(v)));                                     \
241     __w; })
242 #endif /* __clipper__ */
243
244 #if defined (__gmicro__) && W_TYPE_SIZE == 32
245 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
246   __asm__ ("add.w %5,%1
247         addx %3,%0"                                                     \
248            : "=g" ((USItype)(sh)),                                      \
249              "=&g" ((USItype)(sl))                                      \
250            : "%0" ((USItype)(ah)),                                      \
251              "g" ((USItype)(bh)),                                       \
252              "%1" ((USItype)(al)),                                      \
253              "g" ((USItype)(bl)))
254 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
255   __asm__ ("sub.w %5,%1
256         subx %3,%0"                                                     \
257            : "=g" ((USItype)(sh)),                                      \
258              "=&g" ((USItype)(sl))                                      \
259            : "0" ((USItype)(ah)),                                       \
260              "g" ((USItype)(bh)),                                       \
261              "1" ((USItype)(al)),                                       \
262              "g" ((USItype)(bl)))
263 #define umul_ppmm(ph, pl, m0, m1) \
264   __asm__ ("mulx %3,%0,%1"                                              \
265            : "=g" ((USItype)(ph)),                                      \
266              "=r" ((USItype)(pl))                                       \
267            : "%0" ((USItype)(m0)),                                      \
268              "g" ((USItype)(m1)))
269 #define udiv_qrnnd(q, r, nh, nl, d) \
270   __asm__ ("divx %4,%0,%1"                                              \
271            : "=g" ((USItype)(q)),                                       \
272              "=r" ((USItype)(r))                                        \
273            : "1" ((USItype)(nh)),                                       \
274              "0" ((USItype)(nl)),                                       \
275              "g" ((USItype)(d)))
276 #define count_leading_zeros(count, x) \
277   __asm__ ("bsch/1 %1,%0"                                               \
278            : "=g" (count)                                               \
279            : "g" ((USItype)(x)),                                        \
280              "0" ((USItype)0))
281 #endif
282
283 #if defined (__hppa) && W_TYPE_SIZE == 32
284 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
285   __asm__ ("add %4,%5,%1
286         addc %2,%3,%0"                                                  \
287            : "=r" ((USItype)(sh)),                                      \
288              "=&r" ((USItype)(sl))                                      \
289            : "%rM" ((USItype)(ah)),                                     \
290              "rM" ((USItype)(bh)),                                      \
291              "%rM" ((USItype)(al)),                                     \
292              "rM" ((USItype)(bl)))
293 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
294   __asm__ ("sub %4,%5,%1
295         subb %2,%3,%0"                                                  \
296            : "=r" ((USItype)(sh)),                                      \
297              "=&r" ((USItype)(sl))                                      \
298            : "rM" ((USItype)(ah)),                                      \
299              "rM" ((USItype)(bh)),                                      \
300              "rM" ((USItype)(al)),                                      \
301              "rM" ((USItype)(bl)))
302 #if defined (_PA_RISC1_1)
303 #define umul_ppmm(wh, wl, u, v) \
304   do {                                                                  \
305     union {UDItype __ll;                                                \
306            struct {USItype __h, __l;} __i;                              \
307           } __xx;                                                       \
308     __asm__ ("xmpyu %1,%2,%0"                                           \
309              : "=*f" (__xx.__ll)                                        \
310              : "*f" ((USItype)(u)),                                     \
311                "*f" ((USItype)(v)));                                    \
312     (wh) = __xx.__i.__h;                                                \
313     (wl) = __xx.__i.__l;                                                \
314   } while (0)
315 #define UMUL_TIME 8
316 #define UDIV_TIME 60
317 #else
318 #define UMUL_TIME 40
319 #define UDIV_TIME 80
320 #endif
321 #ifndef LONGLONG_STANDALONE
322 #define udiv_qrnnd(q, r, n1, n0, d) \
323   do { USItype __r;                                                     \
324     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
325     (r) = __r;                                                          \
326   } while (0)
327 extern USItype __udiv_qrnnd ();
328 #endif /* LONGLONG_STANDALONE */
329 #define count_leading_zeros(count, x) \
330   do {                                                                  \
331     USItype __tmp;                                                      \
332     __asm__ (                                                           \
333        "ldi             1,%0
334         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
335         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
336         ldo             16(%0),%0               ; Yes.  Perform add.
337         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
338         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
339         ldo             8(%0),%0                ; Yes.  Perform add.
340         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
341         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
342         ldo             4(%0),%0                ; Yes.  Perform add.
343         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
344         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
345         ldo             2(%0),%0                ; Yes.  Perform add.
346         extru           %1,30,1,%1              ; Extract bit 1.
347         sub             %0,%1,%0                ; Subtract it.
348         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
349   } while (0)
350 #endif /* hppa */
351
352 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
353 #define umul_ppmm(xh, xl, m0, m1) \
354   do {                                                                  \
355     union {UDItype __ll;                                                \
356            struct {USItype __h, __l;} __i;                              \
357           } __xx;                                                       \
358     USItype __m0 = (m0), __m1 = (m1);                                   \
359     __asm__ ("mr %0,%3"                                                 \
360              : "=r" (__xx.__i.__h),                                     \
361                "=r" (__xx.__i.__l)                                      \
362              : "%1" (__m0),                                             \
363                "r" (__m1));                                             \
364     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
365     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
366              + (((SItype) __m1 >> 31) & __m0));                         \
367   } while (0)
368 #define smul_ppmm(xh, xl, m0, m1) \
369   do {                                                                  \
370     union {DItype __ll;                                                 \
371            struct {USItype __h, __l;} __i;                              \
372           } __xx;                                                       \
373     __asm__ ("mr %0,%3"                                                 \
374              : "=r" (__xx.__i.__h),                                     \
375                "=r" (__xx.__i.__l)                                      \
376              : "%1" (m0),                                               \
377                "r" (m1));                                               \
378     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
379   } while (0)
380 #define sdiv_qrnnd(q, r, n1, n0, d) \
381   do {                                                                  \
382     union {DItype __ll;                                                 \
383            struct {USItype __h, __l;} __i;                              \
384           } __xx;                                                       \
385     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
386     __asm__ ("dr %0,%2"                                                 \
387              : "=r" (__xx.__ll)                                         \
388              : "0" (__xx.__ll), "r" (d));                               \
389     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
390   } while (0)
391 #endif
392
393 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
394 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
395   __asm__ ("addl %5,%1
396         adcl %3,%0"                                                     \
397            : "=r" ((USItype)(sh)),                                      \
398              "=&r" ((USItype)(sl))                                      \
399            : "%0" ((USItype)(ah)),                                      \
400              "g" ((USItype)(bh)),                                       \
401              "%1" ((USItype)(al)),                                      \
402              "g" ((USItype)(bl)))
403 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
404   __asm__ ("subl %5,%1
405         sbbl %3,%0"                                                     \
406            : "=r" ((USItype)(sh)),                                      \
407              "=&r" ((USItype)(sl))                                      \
408            : "0" ((USItype)(ah)),                                       \
409              "g" ((USItype)(bh)),                                       \
410              "1" ((USItype)(al)),                                       \
411              "g" ((USItype)(bl)))
412 #define umul_ppmm(w1, w0, u, v) \
413   __asm__ ("mull %3"                                                    \
414            : "=a" ((USItype)(w0)),                                      \
415              "=d" ((USItype)(w1))                                       \
416            : "%0" ((USItype)(u)),                                       \
417              "rm" ((USItype)(v)))
418 #define udiv_qrnnd(q, r, n1, n0, d) \
419   __asm__ ("divl %4"                                                    \
420            : "=a" ((USItype)(q)),                                       \
421              "=d" ((USItype)(r))                                        \
422            : "0" ((USItype)(n0)),                                       \
423              "1" ((USItype)(n1)),                                       \
424              "rm" ((USItype)(d)))
425 #define count_leading_zeros(count, x) \
426   do {                                                                  \
427     USItype __cbtmp;                                                    \
428     __asm__ ("bsrl %1,%0"                                               \
429              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
430     (count) = __cbtmp ^ 31;                                             \
431   } while (0)
432 #define count_trailing_zeros(count, x) \
433   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
434 #ifndef UMUL_TIME
435 #define UMUL_TIME 40
436 #endif
437 #ifndef UDIV_TIME
438 #define UDIV_TIME 40
439 #endif
440 #endif /* 80x86 */
441
442 #if defined (__i860__) && W_TYPE_SIZE == 32
443 #define rshift_rhlc(r,h,l,c) \
444   __asm__ ("shr %3,r0,r0\;shrd %1,%2,%0"                                \
445            "=r" (r) : "r" (h), "r" (l), "rn" (c))
446 #endif /* i860 */
447
448 #if defined (__i960__) && W_TYPE_SIZE == 32
449 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
450   __asm__ ("cmpo 1,0\;addc %5,%4,%1\;addc %3,%2,%0"                     \
451            : "=r" ((USItype)(sh)),                                      \
452              "=&r" ((USItype)(sl))                                      \
453            : "%dI" ((USItype)(ah)),                                     \
454              "dI" ((USItype)(bh)),                                      \
455              "%dI" ((USItype)(al)),                                     \
456              "dI" ((USItype)(bl)))
457 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
458   __asm__ ("cmpo 0,0\;subc %5,%4,%1\;subc %3,%2,%0"                     \
459            : "=r" ((USItype)(sh)),                                      \
460              "=&r" ((USItype)(sl))                                      \
461            : "dI" ((USItype)(ah)),                                      \
462              "dI" ((USItype)(bh)),                                      \
463              "dI" ((USItype)(al)),                                      \
464              "dI" ((USItype)(bl)))
465 #define umul_ppmm(w1, w0, u, v) \
466   ({union {UDItype __ll;                                                \
467            struct {USItype __l, __h;} __i;                              \
468           } __xx;                                                       \
469   __asm__ ("emul        %2,%1,%0"                                       \
470            : "=d" (__xx.__ll)                                           \
471            : "%dI" ((USItype)(u)),                                      \
472              "dI" ((USItype)(v)));                                      \
473   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
474 #define __umulsidi3(u, v) \
475   ({UDItype __w;                                                        \
476     __asm__ ("emul      %2,%1,%0"                                       \
477              : "=d" (__w)                                               \
478              : "%dI" ((USItype)(u)),                                    \
479                "dI" ((USItype)(v)));                                    \
480     __w; })
481 #define udiv_qrnnd(q, r, nh, nl, d) \
482   do {                                                                  \
483     union {UDItype __ll;                                                \
484            struct {USItype __l, __h;} __i;                              \
485           } __nn;                                                       \
486     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
487     __asm__ ("ediv %d,%n,%0"                                            \
488            : "=d" (__rq.__ll)                                           \
489            : "dI" (__nn.__ll),                                          \
490              "dI" ((USItype)(d)));                                      \
491     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
492   } while (0)
493 #define count_leading_zeros(count, x) \
494   do {                                                                  \
495     USItype __cbtmp;                                                    \
496     __asm__ ("scanbit %1,%0"                                            \
497              : "=r" (__cbtmp)                                           \
498              : "r" ((USItype)(x)));                                     \
499     (count) = __cbtmp ^ 31;                                             \
500   } while (0)
501 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
502 #if defined (__i960mx)          /* what is the proper symbol to test??? */
503 #define rshift_rhlc(r,h,l,c) \
504   do {                                                                  \
505     union {UDItype __ll;                                                \
506            struct {USItype __l, __h;} __i;                              \
507           } __nn;                                                       \
508     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
509     __asm__ ("shre %2,%1,%0"                                            \
510              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
511   }
512 #endif /* i960mx */
513 #endif /* i960 */
514
515 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
516 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
517   __asm__ ("add%.l %5,%1
518         addx%.l %3,%0"                                                  \
519            : "=d" ((USItype)(sh)),                                      \
520              "=&d" ((USItype)(sl))                                      \
521            : "%0" ((USItype)(ah)),                                      \
522              "d" ((USItype)(bh)),                                       \
523              "%1" ((USItype)(al)),                                      \
524              "g" ((USItype)(bl)))
525 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
526   __asm__ ("sub%.l %5,%1
527         subx%.l %3,%0"                                                  \
528            : "=d" ((USItype)(sh)),                                      \
529              "=&d" ((USItype)(sl))                                      \
530            : "0" ((USItype)(ah)),                                       \
531              "d" ((USItype)(bh)),                                       \
532              "1" ((USItype)(al)),                                       \
533              "g" ((USItype)(bl)))
534 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
535 #define umul_ppmm(w1, w0, u, v) \
536   __asm__ ("mulu%.l %3,%1:%0"                                           \
537            : "=d" ((USItype)(w0)),                                      \
538              "=d" ((USItype)(w1))                                       \
539            : "%0" ((USItype)(u)),                                       \
540              "dmi" ((USItype)(v)))
541 #define UMUL_TIME 45
542 #define udiv_qrnnd(q, r, n1, n0, d) \
543   __asm__ ("divu%.l %4,%1:%0"                                           \
544            : "=d" ((USItype)(q)),                                       \
545              "=d" ((USItype)(r))                                        \
546            : "0" ((USItype)(n0)),                                       \
547              "1" ((USItype)(n1)),                                       \
548              "dmi" ((USItype)(d)))
549 #define UDIV_TIME 90
550 #define sdiv_qrnnd(q, r, n1, n0, d) \
551   __asm__ ("divs%.l %4,%1:%0"                                           \
552            : "=d" ((USItype)(q)),                                       \
553              "=d" ((USItype)(r))                                        \
554            : "0" ((USItype)(n0)),                                       \
555              "1" ((USItype)(n1)),                                       \
556              "dmi" ((USItype)(d)))
557 #define count_leading_zeros(count, x) \
558   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
559            : "=d" ((USItype)(count))                                    \
560            : "od" ((USItype)(x)), "n" (0))
561 #define COUNT_LEADING_ZEROS_0 32
562 #else /* not mc68020 */
563 #define umul_ppmm(xh, xl, a, b) \
564   do { USItype __umul_tmp1, __umul_tmp2;                                \
565         __asm__ ("| Inlined umul_ppmm
566         move%.l %5,%3
567         move%.l %2,%0
568         move%.w %3,%1
569         swap    %3
570         swap    %0
571         mulu    %2,%1
572         mulu    %3,%0
573         mulu    %2,%3
574         swap    %2
575         mulu    %5,%2
576         add%.l  %3,%2
577         jcc     1f
578         add%.l  %#0x10000,%0
579 1:      move%.l %2,%3
580         clr%.w  %2
581         swap    %2
582         swap    %3
583         clr%.w  %3
584         add%.l  %3,%1
585         addx%.l %2,%0
586         | End inlined umul_ppmm"                                        \
587               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
588                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
589               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
590   } while (0)
591 #define UMUL_TIME 100
592 #define UDIV_TIME 400
593 #endif /* not mc68020 */
594 #endif /* mc68000 */
595
596 #if defined (__m88000__) && W_TYPE_SIZE == 32
597 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
598   __asm__ ("addu.co %1,%r4,%r5
599         addu.ci %0,%r2,%r3"                                             \
600            : "=r" ((USItype)(sh)),                                      \
601              "=&r" ((USItype)(sl))                                      \
602            : "%rJ" ((USItype)(ah)),                                     \
603              "rJ" ((USItype)(bh)),                                      \
604              "%rJ" ((USItype)(al)),                                     \
605              "rJ" ((USItype)(bl)))
606 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
607   __asm__ ("subu.co %1,%r4,%r5
608         subu.ci %0,%r2,%r3"                                             \
609            : "=r" ((USItype)(sh)),                                      \
610              "=&r" ((USItype)(sl))                                      \
611            : "rJ" ((USItype)(ah)),                                      \
612              "rJ" ((USItype)(bh)),                                      \
613              "rJ" ((USItype)(al)),                                      \
614              "rJ" ((USItype)(bl)))
615 #define count_leading_zeros(count, x) \
616   do {                                                                  \
617     USItype __cbtmp;                                                    \
618     __asm__ ("ff1 %0,%1"                                                \
619              : "=r" (__cbtmp)                                           \
620              : "r" ((USItype)(x)));                                     \
621     (count) = __cbtmp ^ 31;                                             \
622   } while (0)
623 #define COUNT_LEADING_ZEROS_0 63 /* sic */
624 #if defined (__m88110__)
625 #define umul_ppmm(wh, wl, u, v) \
626   do {                                                                  \
627     union {UDItype __ll;                                                \
628            struct {USItype __h, __l;} __i;                              \
629           } __x;                                                        \
630     __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v));   \
631     (wh) = __x.__i.__h;                                                 \
632     (wl) = __x.__i.__l;                                                 \
633   } while (0)
634 #define udiv_qrnnd(q, r, n1, n0, d) \
635   ({union {UDItype __ll;                                                \
636            struct {USItype __h, __l;} __i;                              \
637           } __x, __q;                                                   \
638   __x.__i.__h = (n1); __x.__i.__l = (n0);                               \
639   __asm__ ("divu.d %0,%1,%2"                                            \
640            : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d));                \
641   (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
642 #define UMUL_TIME 5
643 #define UDIV_TIME 25
644 #else
645 #define UMUL_TIME 17
646 #define UDIV_TIME 150
647 #endif /* __m88110__ */
648 #endif /* __m88000__ */
649
650 #if defined (__mips__) && W_TYPE_SIZE == 32
651 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
652 #define umul_ppmm(w1, w0, u, v) \
653   __asm__ ("multu %2,%3"                                                \
654            : "=l" ((USItype)(w0)),                                      \
655              "=h" ((USItype)(w1))                                       \
656            : "d" ((USItype)(u)),                                        \
657              "d" ((USItype)(v)))
658 #else
659 #define umul_ppmm(w1, w0, u, v) \
660   __asm__ ("multu %2,%3
661         mflo %0
662         mfhi %1"                                                        \
663            : "=d" ((USItype)(w0)),                                      \
664              "=d" ((USItype)(w1))                                       \
665            : "d" ((USItype)(u)),                                        \
666              "d" ((USItype)(v)))
667 #endif
668 #define UMUL_TIME 10
669 #define UDIV_TIME 100
670 #endif /* __mips__ */
671
672 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
673 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
674 #define umul_ppmm(w1, w0, u, v) \
675   __asm__ ("dmultu %2,%3"                                               \
676            : "=l" ((UDItype)(w0)),                                      \
677              "=h" ((UDItype)(w1))                                       \
678            : "d" ((UDItype)(u)),                                        \
679              "d" ((UDItype)(v)))
680 #else
681 #define umul_ppmm(w1, w0, u, v) \
682   __asm__ ("dmultu %2,%3
683         mflo %0
684         mfhi %1"                                                        \
685            : "=d" ((UDItype)(w0)),                                      \
686              "=d" ((UDItype)(w1))                                       \
687            : "d" ((UDItype)(u)),                                        \
688              "d" ((UDItype)(v)))
689 #endif
690 #define UMUL_TIME 20
691 #define UDIV_TIME 140
692 #endif /* __mips__ */
693
694 #if defined (__ns32000__) && W_TYPE_SIZE == 32
695 #define umul_ppmm(w1, w0, u, v) \
696   ({union {UDItype __ll;                                                \
697            struct {USItype __l, __h;} __i;                              \
698           } __xx;                                                       \
699   __asm__ ("meid %2,%0"                                                 \
700            : "=g" (__xx.__ll)                                           \
701            : "%0" ((USItype)(u)),                                       \
702              "g" ((USItype)(v)));                                       \
703   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
704 #define __umulsidi3(u, v) \
705   ({UDItype __w;                                                        \
706     __asm__ ("meid %2,%0"                                               \
707              : "=g" (__w)                                               \
708              : "%0" ((USItype)(u)),                                     \
709                "g" ((USItype)(v)));                                     \
710     __w; })
711 #define udiv_qrnnd(q, r, n1, n0, d) \
712   ({union {UDItype __ll;                                                \
713            struct {USItype __l, __h;} __i;                              \
714           } __xx;                                                       \
715   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
716   __asm__ ("deid %2,%0"                                                 \
717            : "=g" (__xx.__ll)                                           \
718            : "0" (__xx.__ll),                                           \
719              "g" ((USItype)(d)));                                       \
720   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
721 #define count_trailing_zeros(count,x) \
722   do {
723     __asm__ ("ffsd      %2,%0"                                          \
724              : "=r" ((USItype) (count))                                 \
725              : "0" ((USItype) 0),                                       \
726                "r" ((USItype) (x)));                                    \
727   } while (0)
728 #endif /* __ns32000__ */
729
730 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
731 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
732   do {                                                                  \
733     if (__builtin_constant_p (bh) && (bh) == 0)                         \
734       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
735              : "=r" ((USItype)(sh)),                                    \
736                "=&r" ((USItype)(sl))                                    \
737              : "%r" ((USItype)(ah)),                                    \
738                "%r" ((USItype)(al)),                                    \
739                "rI" ((USItype)(bl)));                                   \
740     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
741       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
742              : "=r" ((USItype)(sh)),                                    \
743                "=&r" ((USItype)(sl))                                    \
744              : "%r" ((USItype)(ah)),                                    \
745                "%r" ((USItype)(al)),                                    \
746                "rI" ((USItype)(bl)));                                   \
747     else                                                                \
748       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
749              : "=r" ((USItype)(sh)),                                    \
750                "=&r" ((USItype)(sl))                                    \
751              : "%r" ((USItype)(ah)),                                    \
752                "r" ((USItype)(bh)),                                     \
753                "%r" ((USItype)(al)),                                    \
754                "rI" ((USItype)(bl)));                                   \
755   } while (0)
756 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
757   do {                                                                  \
758     if (__builtin_constant_p (ah) && (ah) == 0)                         \
759       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
760                : "=r" ((USItype)(sh)),                                  \
761                  "=&r" ((USItype)(sl))                                  \
762                : "r" ((USItype)(bh)),                                   \
763                  "rI" ((USItype)(al)),                                  \
764                  "r" ((USItype)(bl)));                                  \
765     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
766       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
767                : "=r" ((USItype)(sh)),                                  \
768                  "=&r" ((USItype)(sl))                                  \
769                : "r" ((USItype)(bh)),                                   \
770                  "rI" ((USItype)(al)),                                  \
771                  "r" ((USItype)(bl)));                                  \
772     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
773       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
774                : "=r" ((USItype)(sh)),                                  \
775                  "=&r" ((USItype)(sl))                                  \
776                : "r" ((USItype)(ah)),                                   \
777                  "rI" ((USItype)(al)),                                  \
778                  "r" ((USItype)(bl)));                                  \
779     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
780       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
781                : "=r" ((USItype)(sh)),                                  \
782                  "=&r" ((USItype)(sl))                                  \
783                : "r" ((USItype)(ah)),                                   \
784                  "rI" ((USItype)(al)),                                  \
785                  "r" ((USItype)(bl)));                                  \
786     else                                                                \
787       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
788                : "=r" ((USItype)(sh)),                                  \
789                  "=&r" ((USItype)(sl))                                  \
790                : "r" ((USItype)(ah)),                                   \
791                  "r" ((USItype)(bh)),                                   \
792                  "rI" ((USItype)(al)),                                  \
793                  "r" ((USItype)(bl)));                                  \
794   } while (0)
795 #define count_leading_zeros(count, x) \
796   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
797            : "=r" ((USItype)(count))                                    \
798            : "r" ((USItype)(x)))
799 #define COUNT_LEADING_ZEROS_0 32
800 #if defined (_ARCH_PPC)
801 #define umul_ppmm(ph, pl, m0, m1) \
802   do {                                                                  \
803     USItype __m0 = (m0), __m1 = (m1);                                   \
804     __asm__ ("mulhwu %0,%1,%2"                                          \
805              : "=r" ((USItype) ph)                                      \
806              : "%r" (__m0),                                             \
807                "r" (__m1));                                             \
808     (pl) = __m0 * __m1;                                                 \
809   } while (0)
810 #define UMUL_TIME 15
811 #define smul_ppmm(ph, pl, m0, m1) \
812   do {                                                                  \
813     SItype __m0 = (m0), __m1 = (m1);                                    \
814     __asm__ ("mulhw %0,%1,%2"                                           \
815              : "=r" ((SItype) ph)                                       \
816              : "%r" (__m0),                                             \
817                "r" (__m1));                                             \
818     (pl) = __m0 * __m1;                                                 \
819   } while (0)
820 #define SMUL_TIME 14
821 #define UDIV_TIME 120
822 #else
823 #define umul_ppmm(xh, xl, m0, m1) \
824   do {                                                                  \
825     USItype __m0 = (m0), __m1 = (m1);                                   \
826     __asm__ ("mul %0,%2,%3"                                             \
827              : "=r" ((USItype)(xh)),                                    \
828                "=q" ((USItype)(xl))                                     \
829              : "r" (__m0),                                              \
830                "r" (__m1));                                             \
831     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
832              + (((SItype) __m1 >> 31) & __m0));                         \
833   } while (0)
834 #define UMUL_TIME 8
835 #define smul_ppmm(xh, xl, m0, m1) \
836   __asm__ ("mul %0,%2,%3"                                               \
837            : "=r" ((SItype)(xh)),                                       \
838              "=q" ((SItype)(xl))                                        \
839            : "r" (m0),                                                  \
840              "r" (m1))
841 #define SMUL_TIME 4
842 #define sdiv_qrnnd(q, r, nh, nl, d) \
843   __asm__ ("div %0,%2,%4"                                               \
844            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
845            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
846 #define UDIV_TIME 100
847 #endif
848 #endif /* Power architecture variants.  */
849
850 #if defined (__pyr__) && W_TYPE_SIZE == 32
851 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
852   __asm__ ("addw        %5,%1
853         addwc   %3,%0"                                                  \
854            : "=r" ((USItype)(sh)),                                      \
855              "=&r" ((USItype)(sl))                                      \
856            : "%0" ((USItype)(ah)),                                      \
857              "g" ((USItype)(bh)),                                       \
858              "%1" ((USItype)(al)),                                      \
859              "g" ((USItype)(bl)))
860 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
861   __asm__ ("subw        %5,%1
862         subwb   %3,%0"                                                  \
863            : "=r" ((USItype)(sh)),                                      \
864              "=&r" ((USItype)(sl))                                      \
865            : "0" ((USItype)(ah)),                                       \
866              "g" ((USItype)(bh)),                                       \
867              "1" ((USItype)(al)),                                       \
868              "g" ((USItype)(bl)))
869 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
870 #define umul_ppmm(w1, w0, u, v) \
871   ({union {UDItype __ll;                                                \
872            struct {USItype __h, __l;} __i;                              \
873           } __xx;                                                       \
874   __asm__ ("movw %1,%R0
875         uemul %2,%0"                                                    \
876            : "=&r" (__xx.__ll)                                          \
877            : "g" ((USItype) (u)),                                       \
878              "g" ((USItype)(v)));                                       \
879   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
880 #endif /* __pyr__ */
881
882 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
883 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
884   __asm__ ("a %1,%5
885         ae %0,%3"                                                       \
886            : "=r" ((USItype)(sh)),                                      \
887              "=&r" ((USItype)(sl))                                      \
888            : "%0" ((USItype)(ah)),                                      \
889              "r" ((USItype)(bh)),                                       \
890              "%1" ((USItype)(al)),                                      \
891              "r" ((USItype)(bl)))
892 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
893   __asm__ ("s %1,%5
894         se %0,%3"                                                       \
895            : "=r" ((USItype)(sh)),                                      \
896              "=&r" ((USItype)(sl))                                      \
897            : "0" ((USItype)(ah)),                                       \
898              "r" ((USItype)(bh)),                                       \
899              "1" ((USItype)(al)),                                       \
900              "r" ((USItype)(bl)))
901 #define umul_ppmm(ph, pl, m0, m1) \
902   do {                                                                  \
903     USItype __m0 = (m0), __m1 = (m1);                                   \
904     __asm__ (                                                           \
905        "s       r2,r2
906         mts     r10,%2
907         m       r2,%3
908         m       r2,%3
909         m       r2,%3
910         m       r2,%3
911         m       r2,%3
912         m       r2,%3
913         m       r2,%3
914         m       r2,%3
915         m       r2,%3
916         m       r2,%3
917         m       r2,%3
918         m       r2,%3
919         m       r2,%3
920         m       r2,%3
921         m       r2,%3
922         m       r2,%3
923         cas     %0,r2,r0
924         mfs     r10,%1"                                                 \
925              : "=r" ((USItype)(ph)),                                    \
926                "=r" ((USItype)(pl))                                     \
927              : "%r" (__m0),                                             \
928                 "r" (__m1)                                              \
929              : "r2");                                                   \
930     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
931              + (((SItype) __m1 >> 31) & __m0));                         \
932   } while (0)
933 #define UMUL_TIME 20
934 #define UDIV_TIME 200
935 #define count_leading_zeros(count, x) \
936   do {                                                                  \
937     if ((x) >= 0x10000)                                                 \
938       __asm__ ("clz     %0,%1"                                          \
939                : "=r" ((USItype)(count))                                \
940                : "r" ((USItype)(x) >> 16));                             \
941     else                                                                \
942       {                                                                 \
943         __asm__ ("clz   %0,%1"                                          \
944                  : "=r" ((USItype)(count))                              \
945                  : "r" ((USItype)(x)));                                 \
946         (count) += 16;                                                  \
947       }                                                                 \
948   } while (0)
949 #endif /* RT/ROMP */
950
951 #if defined (__sh2__) && W_TYPE_SIZE == 32
952 #define umul_ppmm(w1, w0, u, v) \
953   __asm__ (                                                             \
954        "dmulu.l %2,%3
955         sts     macl,%1
956         sts     mach,%0"                                                \
957            : "=r" ((USItype)(w1)),                                      \
958              "=r" ((USItype)(w0))                                       \
959            : "r" ((USItype)(u)),                                        \
960              "r" ((USItype)(v))                                         \
961            : "macl", "mach")
962 #define UMUL_TIME 5
963 #endif
964
965 #if defined (__sparc__) && W_TYPE_SIZE == 32
966 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
967   __asm__ ("addcc %r4,%5,%1
968         addx %r2,%3,%0"                                                 \
969            : "=r" ((USItype)(sh)),                                      \
970              "=&r" ((USItype)(sl))                                      \
971            : "%rJ" ((USItype)(ah)),                                     \
972              "rI" ((USItype)(bh)),                                      \
973              "%rJ" ((USItype)(al)),                                     \
974              "rI" ((USItype)(bl))                                       \
975            __CLOBBER_CC)
976 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
977   __asm__ ("subcc %r4,%5,%1
978         subx %r2,%3,%0"                                                 \
979            : "=r" ((USItype)(sh)),                                      \
980              "=&r" ((USItype)(sl))                                      \
981            : "rJ" ((USItype)(ah)),                                      \
982              "rI" ((USItype)(bh)),                                      \
983              "rJ" ((USItype)(al)),                                      \
984              "rI" ((USItype)(bl))                                       \
985            __CLOBBER_CC)
986 #if defined (__sparc_v8__)
987 /* Don't match immediate range because, 1) it is not often useful,
988    2) the 'I' flag thinks of the range as a 13 bit signed interval,
989    while we want to match a 13 bit interval, sign extended to 32 bits,
990    but INTERPRETED AS UNSIGNED.  */
991 #define umul_ppmm(w1, w0, u, v) \
992   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
993            : "=r" ((USItype)(w1)),                                      \
994              "=r" ((USItype)(w0))                                       \
995            : "r" ((USItype)(u)),                                        \
996              "r" ((USItype)(v)))
997 #define UMUL_TIME 5
998 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
999 #define udiv_qrnnd(q, r, n1, n0, d) \
1000   do {                                                                  \
1001     USItype __q;                                                        \
1002     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1003              : "=r" ((USItype)(__q))                                    \
1004              : "r" ((USItype)(n1)),                                     \
1005                "r" ((USItype)(n0)),                                     \
1006                "r" ((USItype)(d)));                                     \
1007     (r) = (n0) - __q * (d);                                             \
1008     (q) = __q;                                                          \
1009   } while (0)
1010 #define UDIV_TIME 25
1011 #endif /* SUPERSPARC */
1012 #else /* ! __sparc_v8__ */
1013 #if defined (__sparclite__)
1014 /* This has hardware multiply but not divide.  It also has two additional
1015    instructions scan (ffs from high bit) and divscc.  */
1016 #define umul_ppmm(w1, w0, u, v) \
1017   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1018            : "=r" ((USItype)(w1)),                                      \
1019              "=r" ((USItype)(w0))                                       \
1020            : "r" ((USItype)(u)),                                        \
1021              "r" ((USItype)(v)))
1022 #define UMUL_TIME 5
1023 #define udiv_qrnnd(q, r, n1, n0, d) \
1024   __asm__ ("! Inlined udiv_qrnnd
1025         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
1026         tst     %%g0
1027         divscc  %3,%4,%%g1
1028         divscc  %%g1,%4,%%g1
1029         divscc  %%g1,%4,%%g1
1030         divscc  %%g1,%4,%%g1
1031         divscc  %%g1,%4,%%g1
1032         divscc  %%g1,%4,%%g1
1033         divscc  %%g1,%4,%%g1
1034         divscc  %%g1,%4,%%g1
1035         divscc  %%g1,%4,%%g1
1036         divscc  %%g1,%4,%%g1
1037         divscc  %%g1,%4,%%g1
1038         divscc  %%g1,%4,%%g1
1039         divscc  %%g1,%4,%%g1
1040         divscc  %%g1,%4,%%g1
1041         divscc  %%g1,%4,%%g1
1042         divscc  %%g1,%4,%%g1
1043         divscc  %%g1,%4,%%g1
1044         divscc  %%g1,%4,%%g1
1045         divscc  %%g1,%4,%%g1
1046         divscc  %%g1,%4,%%g1
1047         divscc  %%g1,%4,%%g1
1048         divscc  %%g1,%4,%%g1
1049         divscc  %%g1,%4,%%g1
1050         divscc  %%g1,%4,%%g1
1051         divscc  %%g1,%4,%%g1
1052         divscc  %%g1,%4,%%g1
1053         divscc  %%g1,%4,%%g1
1054         divscc  %%g1,%4,%%g1
1055         divscc  %%g1,%4,%%g1
1056         divscc  %%g1,%4,%%g1
1057         divscc  %%g1,%4,%%g1
1058         divscc  %%g1,%4,%0
1059         rd      %%y,%1
1060         bl,a 1f
1061         add     %1,%4,%1
1062 1:      ! End of inline udiv_qrnnd"                                     \
1063            : "=r" ((USItype)(q)),                                       \
1064              "=r" ((USItype)(r))                                        \
1065            : "r" ((USItype)(n1)),                                       \
1066              "r" ((USItype)(n0)),                                       \
1067              "rI" ((USItype)(d))                                        \
1068            : "%g1" __AND_CLOBBER_CC)
1069 #define UDIV_TIME 37
1070 #define count_leading_zeros(count, x) \
1071   __asm__ ("scan %1,0,%0"                                               \
1072            : "=r" ((USItype)(x))                                        \
1073            : "r" ((USItype)(count)))
1074 /* Early sparclites return 63 for an argument of 0, but they warn that future
1075    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1076    undefined.  */
1077 #endif /* __sparclite__ */
1078 #endif /* __sparc_v8__ */
1079 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1080 #ifndef umul_ppmm
1081 #define umul_ppmm(w1, w0, u, v) \
1082   __asm__ ("! Inlined umul_ppmm
1083         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1084         sra     %3,31,%%g2      ! Don't move this insn
1085         and     %2,%%g2,%%g2    ! Don't move this insn
1086         andcc   %%g0,0,%%g1     ! Don't move this insn
1087         mulscc  %%g1,%3,%%g1
1088         mulscc  %%g1,%3,%%g1
1089         mulscc  %%g1,%3,%%g1
1090         mulscc  %%g1,%3,%%g1
1091         mulscc  %%g1,%3,%%g1
1092         mulscc  %%g1,%3,%%g1
1093         mulscc  %%g1,%3,%%g1
1094         mulscc  %%g1,%3,%%g1
1095         mulscc  %%g1,%3,%%g1
1096         mulscc  %%g1,%3,%%g1
1097         mulscc  %%g1,%3,%%g1
1098         mulscc  %%g1,%3,%%g1
1099         mulscc  %%g1,%3,%%g1
1100         mulscc  %%g1,%3,%%g1
1101         mulscc  %%g1,%3,%%g1
1102         mulscc  %%g1,%3,%%g1
1103         mulscc  %%g1,%3,%%g1
1104         mulscc  %%g1,%3,%%g1
1105         mulscc  %%g1,%3,%%g1
1106         mulscc  %%g1,%3,%%g1
1107         mulscc  %%g1,%3,%%g1
1108         mulscc  %%g1,%3,%%g1
1109         mulscc  %%g1,%3,%%g1
1110         mulscc  %%g1,%3,%%g1
1111         mulscc  %%g1,%3,%%g1
1112         mulscc  %%g1,%3,%%g1
1113         mulscc  %%g1,%3,%%g1
1114         mulscc  %%g1,%3,%%g1
1115         mulscc  %%g1,%3,%%g1
1116         mulscc  %%g1,%3,%%g1
1117         mulscc  %%g1,%3,%%g1
1118         mulscc  %%g1,%3,%%g1
1119         mulscc  %%g1,0,%%g1
1120         add     %%g1,%%g2,%0
1121         rd      %%y,%1"                                                 \
1122            : "=r" ((USItype)(w1)),                                      \
1123              "=r" ((USItype)(w0))                                       \
1124            : "%rI" ((USItype)(u)),                                      \
1125              "r" ((USItype)(v))                                         \
1126            : "%g1", "%g2" __AND_CLOBBER_CC)
1127 #define UMUL_TIME 39            /* 39 instructions */
1128 #endif
1129 #ifndef udiv_qrnnd
1130 #ifndef LONGLONG_STANDALONE
1131 #define udiv_qrnnd(q, r, n1, n0, d) \
1132   do { USItype __r;                                                     \
1133     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
1134     (r) = __r;                                                          \
1135   } while (0)
1136 extern USItype __udiv_qrnnd ();
1137 #define UDIV_TIME 140
1138 #endif /* LONGLONG_STANDALONE */
1139 #endif /* udiv_qrnnd */
1140 #endif /* __sparc__ */
1141
1142 #if defined (__vax__) && W_TYPE_SIZE == 32
1143 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1144   __asm__ ("addl2 %5,%1
1145         adwc %3,%0"                                                     \
1146            : "=g" ((USItype)(sh)),                                      \
1147              "=&g" ((USItype)(sl))                                      \
1148            : "%0" ((USItype)(ah)),                                      \
1149              "g" ((USItype)(bh)),                                       \
1150              "%1" ((USItype)(al)),                                      \
1151              "g" ((USItype)(bl)))
1152 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1153   __asm__ ("subl2 %5,%1
1154         sbwc %3,%0"                                                     \
1155            : "=g" ((USItype)(sh)),                                      \
1156              "=&g" ((USItype)(sl))                                      \
1157            : "0" ((USItype)(ah)),                                       \
1158              "g" ((USItype)(bh)),                                       \
1159              "1" ((USItype)(al)),                                       \
1160              "g" ((USItype)(bl)))
1161 #define umul_ppmm(xh, xl, m0, m1) \
1162   do {                                                                  \
1163     union {UDItype __ll;                                                \
1164            struct {USItype __l, __h;} __i;                              \
1165           } __xx;                                                       \
1166     USItype __m0 = (m0), __m1 = (m1);                                   \
1167     __asm__ ("emul %1,%2,$0,%0"                                         \
1168              : "=g" (__xx.__ll)                                         \
1169              : "g" (__m0),                                              \
1170                "g" (__m1));                                             \
1171     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1172     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1173              + (((SItype) __m1 >> 31) & __m0));                         \
1174   } while (0)
1175 #define sdiv_qrnnd(q, r, n1, n0, d) \
1176   do {                                                                  \
1177     union {DItype __ll;                                                 \
1178            struct {SItype __l, __h;} __i;                               \
1179           } __xx;                                                       \
1180     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1181     __asm__ ("ediv %3,%2,%0,%1"                                         \
1182              : "=g" (q), "=g" (r)                                       \
1183              : "g" (__xx.__ll), "g" (d));                               \
1184   } while (0)
1185 #endif /* __vax__ */
1186
1187 #if defined (__z8000__) && W_TYPE_SIZE == 16
1188 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1189   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1190            : "=r" ((unsigned int)(sh)),                                 \
1191              "=&r" ((unsigned int)(sl))                                 \
1192            : "%0" ((unsigned int)(ah)),                                 \
1193              "r" ((unsigned int)(bh)),                                  \
1194              "%1" ((unsigned int)(al)),                                 \
1195              "rQR" ((unsigned int)(bl)))
1196 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1197   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1198            : "=r" ((unsigned int)(sh)),                                 \
1199              "=&r" ((unsigned int)(sl))                                 \
1200            : "0" ((unsigned int)(ah)),                                  \
1201              "r" ((unsigned int)(bh)),                                  \
1202              "1" ((unsigned int)(al)),                                  \
1203              "rQR" ((unsigned int)(bl)))
1204 #define umul_ppmm(xh, xl, m0, m1) \
1205   do {                                                                  \
1206     union {long int __ll;                                               \
1207            struct {unsigned int __h, __l;} __i;                         \
1208           } __xx;                                                       \
1209     unsigned int __m0 = (m0), __m1 = (m1);                              \
1210     __asm__ ("mult      %S0,%H3"                                        \
1211              : "=r" (__xx.__i.__h),                                     \
1212                "=r" (__xx.__i.__l)                                      \
1213              : "%1" (__m0),                                             \
1214                "rQR" (__m1));                                           \
1215     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1216     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1217              + (((signed int) __m1 >> 15) & __m0));                     \
1218   } while (0)
1219 #endif /* __z8000__ */
1220
1221 #endif /* __GNUC__ */
1222
1223
1224 #if !defined (umul_ppmm) && defined (__umulsidi3)
1225 #define umul_ppmm(ph, pl, m0, m1) \
1226   {                                                                     \
1227     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1228     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1229     pl = (UWtype) __ll;                                                 \
1230   }
1231 #endif
1232
1233 #if !defined (__umulsidi3)
1234 #define __umulsidi3(u, v) \
1235   ({UWtype __hi, __lo;                                                  \
1236     umul_ppmm (__hi, __lo, u, v);                                       \
1237     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1238 #endif
1239
1240 /* If this machine has no inline assembler, use C macros.  */
1241
1242 #if !defined (add_ssaaaa)
1243 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1244   do {                                                                  \
1245     UWtype __x;                                                         \
1246     __x = (al) + (bl);                                                  \
1247     (sh) = (ah) + (bh) + (__x < (al));                                  \
1248     (sl) = __x;                                                         \
1249   } while (0)
1250 #endif
1251
1252 #if !defined (sub_ddmmss)
1253 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1254   do {                                                                  \
1255     UWtype __x;                                                         \
1256     __x = (al) - (bl);                                                  \
1257     (sh) = (ah) - (bh) - (__x > (al));                                  \
1258     (sl) = __x;                                                         \
1259   } while (0)
1260 #endif
1261
1262 #if !defined (umul_ppmm)
1263 #define umul_ppmm(w1, w0, u, v)                                         \
1264   do {                                                                  \
1265     UWtype __x0, __x1, __x2, __x3;                                      \
1266     UHWtype __ul, __vl, __uh, __vh;                                     \
1267     UWtype __u = (u), __v = (v);                                        \
1268                                                                         \
1269     __ul = __ll_lowpart (__u);                                          \
1270     __uh = __ll_highpart (__u);                                         \
1271     __vl = __ll_lowpart (__v);                                          \
1272     __vh = __ll_highpart (__v);                                         \
1273                                                                         \
1274     __x0 = (UWtype) __ul * __vl;                                        \
1275     __x1 = (UWtype) __ul * __vh;                                        \
1276     __x2 = (UWtype) __uh * __vl;                                        \
1277     __x3 = (UWtype) __uh * __vh;                                        \
1278                                                                         \
1279     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1280     __x1 += __x2;               /* but this indeed can */               \
1281     if (__x1 < __x2)            /* did we get it? */                    \
1282       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1283                                                                         \
1284     (w1) = __x3 + __ll_highpart (__x1);                                 \
1285     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1286   } while (0)
1287 #endif
1288
1289 #if !defined (umul_ppmm)
1290 #define smul_ppmm(w1, w0, u, v)                                         \
1291   do {                                                                  \
1292     UWtype __w1;                                                        \
1293     UWtype __m0 = (u), __m1 = (v);                                      \
1294     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1295     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1296                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1297   } while (0)
1298 #endif
1299
1300 /* Define this unconditionally, so it can be used for debugging.  */
1301 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1302   do {                                                                  \
1303     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1304     __d1 = __ll_highpart (d);                                           \
1305     __d0 = __ll_lowpart (d);                                            \
1306                                                                         \
1307     __r1 = (n1) % __d1;                                                 \
1308     __q1 = (n1) / __d1;                                                 \
1309     __m = (UWtype) __q1 * __d0;                                         \
1310     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1311     if (__r1 < __m)                                                     \
1312       {                                                                 \
1313         __q1--, __r1 += (d);                                            \
1314         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1315           if (__r1 < __m)                                               \
1316             __q1--, __r1 += (d);                                        \
1317       }                                                                 \
1318     __r1 -= __m;                                                        \
1319                                                                         \
1320     __r0 = __r1 % __d1;                                                 \
1321     __q0 = __r1 / __d1;                                                 \
1322     __m = (UWtype) __q0 * __d0;                                         \
1323     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1324     if (__r0 < __m)                                                     \
1325       {                                                                 \
1326         __q0--, __r0 += (d);                                            \
1327         if (__r0 >= (d))                                                \
1328           if (__r0 < __m)                                               \
1329             __q0--, __r0 += (d);                                        \
1330       }                                                                 \
1331     __r0 -= __m;                                                        \
1332                                                                         \
1333     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1334     (r) = __r0;                                                         \
1335   } while (0)
1336
1337 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1338    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1339 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1340 #define udiv_qrnnd(q, r, nh, nl, d) \
1341   do {                                                                  \
1342     UWtype __r;                                                         \
1343     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1344     (r) = __r;                                                          \
1345   } while (0)
1346 #endif
1347
1348 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1349 #if !defined (udiv_qrnnd)
1350 #define UDIV_NEEDS_NORMALIZATION 1
1351 #define udiv_qrnnd __udiv_qrnnd_c
1352 #endif
1353
1354 #if !defined (count_leading_zeros)
1355 extern
1356 #ifdef __STDC__
1357 const
1358 #endif
1359 unsigned char __clz_tab[];
1360 #define count_leading_zeros(count, x) \
1361   do {                                                                  \
1362     UWtype __xr = (x);                                                  \
1363     UWtype __a;                                                         \
1364                                                                         \
1365     if (W_TYPE_SIZE <= 32)                                              \
1366       {                                                                 \
1367         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1368           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1369           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1370       }                                                                 \
1371     else                                                                \
1372       {                                                                 \
1373         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1374           if (((__xr >> __a) & 0xff) != 0)                              \
1375             break;                                                      \
1376       }                                                                 \
1377                                                                         \
1378     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1379   } while (0)
1380 /* This version gives a well-defined value for zero. */
1381 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1382 #endif
1383
1384 #if !defined (count_trailing_zeros)
1385 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1386    defined in asm, but if it is not, the C version above is good enough.  */
1387 #define count_trailing_zeros(count, x) \
1388   do {                                                                  \
1389     UWtype __ctz_x = (x);                                               \
1390     UWtype __ctz_c;                                                     \
1391     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1392     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1393   } while (0)
1394 #endif
1395
1396 #ifndef UDIV_NEEDS_NORMALIZATION
1397 #define UDIV_NEEDS_NORMALIZATION 0
1398 #endif