released 1.1.4
[libgcrypt.git] / mpi / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2    Note: I added some stuff for use with gnupg
3
4 Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998,
5               2000, 2001 Free Software Foundation, Inc.
6
7 This file is free software; you can redistribute it and/or modify
8 it under the terms of the GNU Library General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or (at your
10 option) any later version.
11
12 This file is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
15 License for more details.
16
17 You should have received a copy of the GNU Library General Public License
18 along with this file; see the file COPYING.LIB.  If not, write to
19 the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 MA 02111-1307, USA. */
21
22 /* You have to define the following before including this file:
23
24    UWtype -- An unsigned type, default type for operations (typically a "word")
25    UHWtype -- An unsigned type, at least half the size of UWtype.
26    UDWtype -- An unsigned type, at least twice as large a UWtype
27    W_TYPE_SIZE -- size in bits of UWtype
28
29    SItype, USItype -- Signed and unsigned 32 bit types.
30    DItype, UDItype -- Signed and unsigned 64 bit types.
31
32    On a 32 bit machine UWtype should typically be USItype;
33    on a 64 bit machine, UWtype should typically be UDItype.
34 */
35
36 #define __BITS4 (W_TYPE_SIZE / 4)
37 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
38 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
39 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
40
41 /* This is used to make sure no undesirable sharing between different libraries
42    that use this file takes place.  */
43 #ifndef __MPN
44 #define __MPN(x) __##x
45 #endif
46
47 /* Define auxiliary asm macros.
48
49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
51    word product in HIGH_PROD and LOW_PROD.
52
53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
54    UDWtype product.  This is just a variant of umul_ppmm.
55
56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
57    denominator) divides a UDWtype, composed by the UWtype integers
58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
60    than DENOMINATOR for correct operation.  If, in addition, the most
61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
62    UDIV_NEEDS_NORMALIZATION is defined to 1.
63
64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
66    is rounded towards 0.
67
68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
69    msb to the first non-zero bit in the UWtype X.  This is the number of
70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
72
73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
74    from the least significant end.
75
76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
80    (i.e. carry out) is not stored anywhere, and is lost.
81
82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
87    and is lost.
88
89    If any of these macros are left undefined for a particular CPU,
90    C macros are used.  */
91
92 /* The CPUs come in alphabetical order below.
93
94    Please add support for more CPUs here, or improve the current support
95    for the CPUs below!  */
96
97 #if defined (__GNUC__) && !defined (NO_ASM)
98
99 /* We sometimes need to clobber "cc" with gcc2, but that would not be
100    understood by gcc1.  Use cpp to avoid major code duplication.  */
101 #if __GNUC__ < 2
102 #define __CLOBBER_CC
103 #define __AND_CLOBBER_CC
104 #else /* __GNUC__ >= 2 */
105 #define __CLOBBER_CC : "cc"
106 #define __AND_CLOBBER_CC , "cc"
107 #endif /* __GNUC__ < 2 */
108
109
110 /***************************************
111  **************  A29K  *****************
112  ***************************************/
113 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
114 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
115   __asm__ ("add %1,%4,%5
116         addc %0,%2,%3"                                                  \
117            : "=r" ((USItype)(sh)),                                      \
118             "=&r" ((USItype)(sl))                                       \
119            : "%r" ((USItype)(ah)),                                      \
120              "rI" ((USItype)(bh)),                                      \
121              "%r" ((USItype)(al)),                                      \
122              "rI" ((USItype)(bl)))
123 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
124   __asm__ ("sub %1,%4,%5
125         subc %0,%2,%3"                                                  \
126            : "=r" ((USItype)(sh)),                                      \
127              "=&r" ((USItype)(sl))                                      \
128            : "r" ((USItype)(ah)),                                       \
129              "rI" ((USItype)(bh)),                                      \
130              "r" ((USItype)(al)),                                       \
131              "rI" ((USItype)(bl)))
132 #define umul_ppmm(xh, xl, m0, m1) \
133   do {                                                                  \
134     USItype __m0 = (m0), __m1 = (m1);                                   \
135     __asm__ ("multiplu %0,%1,%2"                                        \
136              : "=r" ((USItype)(xl))                                     \
137              : "r" (__m0),                                              \
138                "r" (__m1));                                             \
139     __asm__ ("multmu %0,%1,%2"                                          \
140              : "=r" ((USItype)(xh))                                     \
141              : "r" (__m0),                                              \
142                "r" (__m1));                                             \
143   } while (0)
144 #define udiv_qrnnd(q, r, n1, n0, d) \
145   __asm__ ("dividu %0,%3,%4"                                            \
146            : "=r" ((USItype)(q)),                                       \
147              "=q" ((USItype)(r))                                        \
148            : "1" ((USItype)(n1)),                                       \
149              "r" ((USItype)(n0)),                                       \
150              "r" ((USItype)(d)))
151 #define count_leading_zeros(count, x) \
152     __asm__ ("clz %0,%1"                                                \
153              : "=r" ((USItype)(count))                                  \
154              : "r" ((USItype)(x)))
155 #define COUNT_LEADING_ZEROS_0 32
156 #endif /* __a29k__ */
157
158
159 #if defined (__alpha) && W_TYPE_SIZE == 64
160 #define umul_ppmm(ph, pl, m0, m1) \
161   do {                                                                  \
162     UDItype __m0 = (m0), __m1 = (m1);                                   \
163     __asm__ ("umulh %r1,%2,%0"                                          \
164              : "=r" ((UDItype) ph)                                      \
165              : "%rJ" (__m0),                                            \
166                "rI" (__m1));                                            \
167     (pl) = __m0 * __m1;                                                 \
168   } while (0)
169 #define UMUL_TIME 46
170 #ifndef LONGLONG_STANDALONE
171 #define udiv_qrnnd(q, r, n1, n0, d) \
172   do { UDItype __r;                                                     \
173     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
174     (r) = __r;                                                          \
175   } while (0)
176 extern UDItype __udiv_qrnnd ();
177 #define UDIV_TIME 220
178 #endif /* LONGLONG_STANDALONE */
179 #endif /* __alpha */
180
181 /***************************************
182  **************  ARM  ******************
183  ***************************************/
184 #if defined (__arm__) && W_TYPE_SIZE == 32
185 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
186   __asm__ ("adds        %1, %4, %5
187         adc     %0, %2, %3"                                             \
188            : "=r" ((USItype)(sh)),                                      \
189              "=&r" ((USItype)(sl))                                      \
190            : "%r" ((USItype)(ah)),                                      \
191              "rI" ((USItype)(bh)),                                      \
192              "%r" ((USItype)(al)),                                      \
193              "rI" ((USItype)(bl)))
194 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
195   __asm__ ("subs        %1, %4, %5
196         sbc     %0, %2, %3"                                             \
197            : "=r" ((USItype)(sh)),                                      \
198              "=&r" ((USItype)(sl))                                      \
199            : "r" ((USItype)(ah)),                                       \
200              "rI" ((USItype)(bh)),                                      \
201              "r" ((USItype)(al)),                                       \
202              "rI" ((USItype)(bl)))
203 #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__
204 #define umul_ppmm(xh, xl, a, b) \
205   __asm__ ("%@ Inlined umul_ppmm
206         mov     %|r0, %2, lsr #16               @ AAAA
207         mov     %|r2, %3, lsr #16               @ BBBB
208         bic     %|r1, %2, %|r0, lsl #16         @ aaaa
209         bic     %0, %3, %|r2, lsl #16           @ bbbb
210         mul     %1, %|r1, %|r2                  @ aaaa * BBBB
211         mul     %|r2, %|r0, %|r2                @ AAAA * BBBB
212         mul     %|r1, %0, %|r1                  @ aaaa * bbbb
213         mul     %0, %|r0, %0                    @ AAAA * bbbb
214         adds    %|r0, %1, %0                    @ central sum
215         addcs   %|r2, %|r2, #65536
216         adds    %1, %|r1, %|r0, lsl #16
217         adc     %0, %|r2, %|r0, lsr #16"                                \
218            : "=&r" ((USItype)(xh)),                                     \
219              "=r" ((USItype)(xl))                                       \
220            : "r" ((USItype)(a)),                                        \
221              "r" ((USItype)(b))                                         \
222            : "r0", "r1", "r2")
223 #else
224 #define umul_ppmm(xh, xl, a, b) \
225   __asm__ ("%@ Inlined umul_ppmm
226         umull   %r1, %r0, %r2, %r3" \
227                    : "=&r" ((USItype)(xh)), \
228                      "=r" ((USItype)(xl)) \
229                    : "r" ((USItype)(a)), \
230                      "r" ((USItype)(b)) \
231                    : "r0", "r1")
232 #endif
233 #define UMUL_TIME 20
234 #define UDIV_TIME 100
235 #endif /* __arm__ */
236
237 /***************************************
238  **************  CLIPPER  **************
239  ***************************************/
240 #if defined (__clipper__) && W_TYPE_SIZE == 32
241 #define umul_ppmm(w1, w0, u, v) \
242   ({union {UDItype __ll;                                                \
243            struct {USItype __l, __h;} __i;                              \
244           } __xx;                                                       \
245   __asm__ ("mulwux %2,%0"                                               \
246            : "=r" (__xx.__ll)                                           \
247            : "%0" ((USItype)(u)),                                       \
248              "r" ((USItype)(v)));                                       \
249   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
250 #define smul_ppmm(w1, w0, u, v) \
251   ({union {DItype __ll;                                                 \
252            struct {SItype __l, __h;} __i;                               \
253           } __xx;                                                       \
254   __asm__ ("mulwx %2,%0"                                                \
255            : "=r" (__xx.__ll)                                           \
256            : "%0" ((SItype)(u)),                                        \
257              "r" ((SItype)(v)));                                        \
258   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
259 #define __umulsidi3(u, v) \
260   ({UDItype __w;                                                        \
261     __asm__ ("mulwux %2,%0"                                             \
262              : "=r" (__w)                                               \
263              : "%0" ((USItype)(u)),                                     \
264                "r" ((USItype)(v)));                                     \
265     __w; })
266 #endif /* __clipper__ */
267
268
269 /***************************************
270  **************  GMICRO  ***************
271  ***************************************/
272 #if defined (__gmicro__) && W_TYPE_SIZE == 32
273 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
274   __asm__ ("add.w %5,%1
275         addx %3,%0"                                                     \
276            : "=g" ((USItype)(sh)),                                      \
277              "=&g" ((USItype)(sl))                                      \
278            : "%0" ((USItype)(ah)),                                      \
279              "g" ((USItype)(bh)),                                       \
280              "%1" ((USItype)(al)),                                      \
281              "g" ((USItype)(bl)))
282 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
283   __asm__ ("sub.w %5,%1
284         subx %3,%0"                                                     \
285            : "=g" ((USItype)(sh)),                                      \
286              "=&g" ((USItype)(sl))                                      \
287            : "0" ((USItype)(ah)),                                       \
288              "g" ((USItype)(bh)),                                       \
289              "1" ((USItype)(al)),                                       \
290              "g" ((USItype)(bl)))
291 #define umul_ppmm(ph, pl, m0, m1) \
292   __asm__ ("mulx %3,%0,%1"                                              \
293            : "=g" ((USItype)(ph)),                                      \
294              "=r" ((USItype)(pl))                                       \
295            : "%0" ((USItype)(m0)),                                      \
296              "g" ((USItype)(m1)))
297 #define udiv_qrnnd(q, r, nh, nl, d) \
298   __asm__ ("divx %4,%0,%1"                                              \
299            : "=g" ((USItype)(q)),                                       \
300              "=r" ((USItype)(r))                                        \
301            : "1" ((USItype)(nh)),                                       \
302              "0" ((USItype)(nl)),                                       \
303              "g" ((USItype)(d)))
304 #define count_leading_zeros(count, x) \
305   __asm__ ("bsch/1 %1,%0"                                               \
306            : "=g" (count)                                               \
307            : "g" ((USItype)(x)),                                        \
308              "0" ((USItype)0))
309 #endif
310
311
312 /***************************************
313  **************  HPPA  *****************
314  ***************************************/
315 #if defined (__hppa) && W_TYPE_SIZE == 32
316 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
317   __asm__ ("add %4,%5,%1
318         addc %2,%3,%0"                                                  \
319            : "=r" ((USItype)(sh)),                                      \
320              "=&r" ((USItype)(sl))                                      \
321            : "%rM" ((USItype)(ah)),                                     \
322              "rM" ((USItype)(bh)),                                      \
323              "%rM" ((USItype)(al)),                                     \
324              "rM" ((USItype)(bl)))
325 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
326   __asm__ ("sub %4,%5,%1
327         subb %2,%3,%0"                                                  \
328            : "=r" ((USItype)(sh)),                                      \
329              "=&r" ((USItype)(sl))                                      \
330            : "rM" ((USItype)(ah)),                                      \
331              "rM" ((USItype)(bh)),                                      \
332              "rM" ((USItype)(al)),                                      \
333              "rM" ((USItype)(bl)))
334 #if defined (_PA_RISC1_1)
335 #define umul_ppmm(wh, wl, u, v) \
336   do {                                                                  \
337     union {UDItype __ll;                                                \
338            struct {USItype __h, __l;} __i;                              \
339           } __xx;                                                       \
340     __asm__ ("xmpyu %1,%2,%0"                                           \
341              : "=*f" (__xx.__ll)                                        \
342              : "*f" ((USItype)(u)),                                     \
343                "*f" ((USItype)(v)));                                    \
344     (wh) = __xx.__i.__h;                                                \
345     (wl) = __xx.__i.__l;                                                \
346   } while (0)
347 #define UMUL_TIME 8
348 #define UDIV_TIME 60
349 #else
350 #define UMUL_TIME 40
351 #define UDIV_TIME 80
352 #endif
353 #ifndef LONGLONG_STANDALONE
354 #define udiv_qrnnd(q, r, n1, n0, d) \
355   do { USItype __r;                                                     \
356     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
357     (r) = __r;                                                          \
358   } while (0)
359 extern USItype __udiv_qrnnd ();
360 #endif /* LONGLONG_STANDALONE */
361 #define count_leading_zeros(count, x) \
362   do {                                                                  \
363     USItype __tmp;                                                      \
364     __asm__ (                                                           \
365        "ldi             1,%0
366         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
367         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
368         ldo             16(%0),%0               ; Yes.  Perform add.
369         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
370         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
371         ldo             8(%0),%0                ; Yes.  Perform add.
372         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
373         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
374         ldo             4(%0),%0                ; Yes.  Perform add.
375         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
376         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
377         ldo             2(%0),%0                ; Yes.  Perform add.
378         extru           %1,30,1,%1              ; Extract bit 1.
379         sub             %0,%1,%0                ; Subtract it.
380         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
381   } while (0)
382 #endif /* hppa */
383
384
385 /***************************************
386  **************  I370  *****************
387  ***************************************/
388 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
389 #define umul_ppmm(xh, xl, m0, m1) \
390   do {                                                                  \
391     union {UDItype __ll;                                                \
392            struct {USItype __h, __l;} __i;                              \
393           } __xx;                                                       \
394     USItype __m0 = (m0), __m1 = (m1);                                   \
395     __asm__ ("mr %0,%3"                                                 \
396              : "=r" (__xx.__i.__h),                                     \
397                "=r" (__xx.__i.__l)                                      \
398              : "%1" (__m0),                                             \
399                "r" (__m1));                                             \
400     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
401     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
402              + (((SItype) __m1 >> 31) & __m0));                         \
403   } while (0)
404 #define smul_ppmm(xh, xl, m0, m1) \
405   do {                                                                  \
406     union {DItype __ll;                                                 \
407            struct {USItype __h, __l;} __i;                              \
408           } __xx;                                                       \
409     __asm__ ("mr %0,%3"                                                 \
410              : "=r" (__xx.__i.__h),                                     \
411                "=r" (__xx.__i.__l)                                      \
412              : "%1" (m0),                                               \
413                "r" (m1));                                               \
414     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
415   } while (0)
416 #define sdiv_qrnnd(q, r, n1, n0, d) \
417   do {                                                                  \
418     union {DItype __ll;                                                 \
419            struct {USItype __h, __l;} __i;                              \
420           } __xx;                                                       \
421     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
422     __asm__ ("dr %0,%2"                                                 \
423              : "=r" (__xx.__ll)                                         \
424              : "0" (__xx.__ll), "r" (d));                               \
425     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
426   } while (0)
427 #endif
428
429
430 /***************************************
431  **************  I386  *****************
432  ***************************************/
433 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
434 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
435   __asm__ ("addl %5,%1
436         adcl %3,%0"                                                     \
437            : "=r" ((USItype)(sh)),                                      \
438              "=&r" ((USItype)(sl))                                      \
439            : "%0" ((USItype)(ah)),                                      \
440              "g" ((USItype)(bh)),                                       \
441              "%1" ((USItype)(al)),                                      \
442              "g" ((USItype)(bl)))
443 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
444   __asm__ ("subl %5,%1
445         sbbl %3,%0"                                                     \
446            : "=r" ((USItype)(sh)),                                      \
447              "=&r" ((USItype)(sl))                                      \
448            : "0" ((USItype)(ah)),                                       \
449              "g" ((USItype)(bh)),                                       \
450              "1" ((USItype)(al)),                                       \
451              "g" ((USItype)(bl)))
452 #define umul_ppmm(w1, w0, u, v) \
453   __asm__ ("mull %3"                                                    \
454            : "=a" ((USItype)(w0)),                                      \
455              "=d" ((USItype)(w1))                                       \
456            : "%0" ((USItype)(u)),                                       \
457              "rm" ((USItype)(v)))
458 #define udiv_qrnnd(q, r, n1, n0, d) \
459   __asm__ ("divl %4"                                                    \
460            : "=a" ((USItype)(q)),                                       \
461              "=d" ((USItype)(r))                                        \
462            : "0" ((USItype)(n0)),                                       \
463              "1" ((USItype)(n1)),                                       \
464              "rm" ((USItype)(d)))
465 #define count_leading_zeros(count, x) \
466   do {                                                                  \
467     USItype __cbtmp;                                                    \
468     __asm__ ("bsrl %1,%0"                                               \
469              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
470     (count) = __cbtmp ^ 31;                                             \
471   } while (0)
472 #define count_trailing_zeros(count, x) \
473   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
474 #ifndef UMUL_TIME
475 #define UMUL_TIME 40
476 #endif
477 #ifndef UDIV_TIME
478 #define UDIV_TIME 40
479 #endif
480 #endif /* 80x86 */
481
482
483 /***************************************
484  **************  I860  *****************
485  ***************************************/
486 #if defined (__i860__) && W_TYPE_SIZE == 32
487 #define rshift_rhlc(r,h,l,c) \
488   __asm__ ("shr %3,r0,r0\;shrd %1,%2,%0"                                \
489            "=r" (r) : "r" (h), "r" (l), "rn" (c))
490 #endif /* i860 */
491
492 /***************************************
493  **************  I960  *****************
494  ***************************************/
495 #if defined (__i960__) && W_TYPE_SIZE == 32
496 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
497   __asm__ ("cmpo 1,0\;addc %5,%4,%1\;addc %3,%2,%0"                     \
498            : "=r" ((USItype)(sh)),                                      \
499              "=&r" ((USItype)(sl))                                      \
500            : "%dI" ((USItype)(ah)),                                     \
501              "dI" ((USItype)(bh)),                                      \
502              "%dI" ((USItype)(al)),                                     \
503              "dI" ((USItype)(bl)))
504 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
505   __asm__ ("cmpo 0,0\;subc %5,%4,%1\;subc %3,%2,%0"                     \
506            : "=r" ((USItype)(sh)),                                      \
507              "=&r" ((USItype)(sl))                                      \
508            : "dI" ((USItype)(ah)),                                      \
509              "dI" ((USItype)(bh)),                                      \
510              "dI" ((USItype)(al)),                                      \
511              "dI" ((USItype)(bl)))
512 #define umul_ppmm(w1, w0, u, v) \
513   ({union {UDItype __ll;                                                \
514            struct {USItype __l, __h;} __i;                              \
515           } __xx;                                                       \
516   __asm__ ("emul        %2,%1,%0"                                       \
517            : "=d" (__xx.__ll)                                           \
518            : "%dI" ((USItype)(u)),                                      \
519              "dI" ((USItype)(v)));                                      \
520   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
521 #define __umulsidi3(u, v) \
522   ({UDItype __w;                                                        \
523     __asm__ ("emul      %2,%1,%0"                                       \
524              : "=d" (__w)                                               \
525              : "%dI" ((USItype)(u)),                                    \
526                "dI" ((USItype)(v)));                                    \
527     __w; })
528 #define udiv_qrnnd(q, r, nh, nl, d) \
529   do {                                                                  \
530     union {UDItype __ll;                                                \
531            struct {USItype __l, __h;} __i;                              \
532           } __nn;                                                       \
533     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
534     __asm__ ("ediv %d,%n,%0"                                            \
535            : "=d" (__rq.__ll)                                           \
536            : "dI" (__nn.__ll),                                          \
537              "dI" ((USItype)(d)));                                      \
538     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
539   } while (0)
540 #define count_leading_zeros(count, x) \
541   do {                                                                  \
542     USItype __cbtmp;                                                    \
543     __asm__ ("scanbit %1,%0"                                            \
544              : "=r" (__cbtmp)                                           \
545              : "r" ((USItype)(x)));                                     \
546     (count) = __cbtmp ^ 31;                                             \
547   } while (0)
548 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
549 #if defined (__i960mx)          /* what is the proper symbol to test??? */
550 #define rshift_rhlc(r,h,l,c) \
551   do {                                                                  \
552     union {UDItype __ll;                                                \
553            struct {USItype __l, __h;} __i;                              \
554           } __nn;                                                       \
555     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
556     __asm__ ("shre %2,%1,%0"                                            \
557              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
558   }
559 #endif /* i960mx */
560 #endif /* i960 */
561
562
563 /***************************************
564  **************  68000  ****************
565  ***************************************/
566 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
567 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
568   __asm__ ("add%.l %5,%1
569         addx%.l %3,%0"                                                  \
570            : "=d" ((USItype)(sh)),                                      \
571              "=&d" ((USItype)(sl))                                      \
572            : "%0" ((USItype)(ah)),                                      \
573              "d" ((USItype)(bh)),                                       \
574              "%1" ((USItype)(al)),                                      \
575              "g" ((USItype)(bl)))
576 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
577   __asm__ ("sub%.l %5,%1
578         subx%.l %3,%0"                                                  \
579            : "=d" ((USItype)(sh)),                                      \
580              "=&d" ((USItype)(sl))                                      \
581            : "0" ((USItype)(ah)),                                       \
582              "d" ((USItype)(bh)),                                       \
583              "1" ((USItype)(al)),                                       \
584              "g" ((USItype)(bl)))
585 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
586 #define umul_ppmm(w1, w0, u, v) \
587   __asm__ ("mulu%.l %3,%1:%0"                                           \
588            : "=d" ((USItype)(w0)),                                      \
589              "=d" ((USItype)(w1))                                       \
590            : "%0" ((USItype)(u)),                                       \
591              "dmi" ((USItype)(v)))
592 #define UMUL_TIME 45
593 #define udiv_qrnnd(q, r, n1, n0, d) \
594   __asm__ ("divu%.l %4,%1:%0"                                           \
595            : "=d" ((USItype)(q)),                                       \
596              "=d" ((USItype)(r))                                        \
597            : "0" ((USItype)(n0)),                                       \
598              "1" ((USItype)(n1)),                                       \
599              "dmi" ((USItype)(d)))
600 #define UDIV_TIME 90
601 #define sdiv_qrnnd(q, r, n1, n0, d) \
602   __asm__ ("divs%.l %4,%1:%0"                                           \
603            : "=d" ((USItype)(q)),                                       \
604              "=d" ((USItype)(r))                                        \
605            : "0" ((USItype)(n0)),                                       \
606              "1" ((USItype)(n1)),                                       \
607              "dmi" ((USItype)(d)))
608 #define count_leading_zeros(count, x) \
609   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
610            : "=d" ((USItype)(count))                                    \
611            : "od" ((USItype)(x)), "n" (0))
612 #define COUNT_LEADING_ZEROS_0 32
613 #else /* not mc68020 */
614 #define umul_ppmm(xh, xl, a, b) \
615   do { USItype __umul_tmp1, __umul_tmp2;                                \
616         __asm__ ("| Inlined umul_ppmm
617         move%.l %5,%3
618         move%.l %2,%0
619         move%.w %3,%1
620         swap    %3
621         swap    %0
622         mulu    %2,%1
623         mulu    %3,%0
624         mulu    %2,%3
625         swap    %2
626         mulu    %5,%2
627         add%.l  %3,%2
628         jcc     1f
629         add%.l  %#0x10000,%0
630 1:      move%.l %2,%3
631         clr%.w  %2
632         swap    %2
633         swap    %3
634         clr%.w  %3
635         add%.l  %3,%1
636         addx%.l %2,%0
637         | End inlined umul_ppmm"                                        \
638               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
639                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
640               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
641   } while (0)
642 #define UMUL_TIME 100
643 #define UDIV_TIME 400
644 #endif /* not mc68020 */
645 #endif /* mc68000 */
646
647
648 /***************************************
649  **************  88000  ****************
650  ***************************************/
651 #if defined (__m88000__) && W_TYPE_SIZE == 32
652 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
653   __asm__ ("addu.co %1,%r4,%r5
654         addu.ci %0,%r2,%r3"                                             \
655            : "=r" ((USItype)(sh)),                                      \
656              "=&r" ((USItype)(sl))                                      \
657            : "%rJ" ((USItype)(ah)),                                     \
658              "rJ" ((USItype)(bh)),                                      \
659              "%rJ" ((USItype)(al)),                                     \
660              "rJ" ((USItype)(bl)))
661 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
662   __asm__ ("subu.co %1,%r4,%r5
663         subu.ci %0,%r2,%r3"                                             \
664            : "=r" ((USItype)(sh)),                                      \
665              "=&r" ((USItype)(sl))                                      \
666            : "rJ" ((USItype)(ah)),                                      \
667              "rJ" ((USItype)(bh)),                                      \
668              "rJ" ((USItype)(al)),                                      \
669              "rJ" ((USItype)(bl)))
670 #define count_leading_zeros(count, x) \
671   do {                                                                  \
672     USItype __cbtmp;                                                    \
673     __asm__ ("ff1 %0,%1"                                                \
674              : "=r" (__cbtmp)                                           \
675              : "r" ((USItype)(x)));                                     \
676     (count) = __cbtmp ^ 31;                                             \
677   } while (0)
678 #define COUNT_LEADING_ZEROS_0 63 /* sic */
679 #if defined (__m88110__)
680 #define umul_ppmm(wh, wl, u, v) \
681   do {                                                                  \
682     union {UDItype __ll;                                                \
683            struct {USItype __h, __l;} __i;                              \
684           } __x;                                                        \
685     __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v));   \
686     (wh) = __x.__i.__h;                                                 \
687     (wl) = __x.__i.__l;                                                 \
688   } while (0)
689 #define udiv_qrnnd(q, r, n1, n0, d) \
690   ({union {UDItype __ll;                                                \
691            struct {USItype __h, __l;} __i;                              \
692           } __x, __q;                                                   \
693   __x.__i.__h = (n1); __x.__i.__l = (n0);                               \
694   __asm__ ("divu.d %0,%1,%2"                                            \
695            : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d));                \
696   (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
697 #define UMUL_TIME 5
698 #define UDIV_TIME 25
699 #else
700 #define UMUL_TIME 17
701 #define UDIV_TIME 150
702 #endif /* __m88110__ */
703 #endif /* __m88000__ */
704
705
706 /***************************************
707  **************  MIPS  *****************
708  ***************************************/
709 #if defined (__mips__) && W_TYPE_SIZE == 32
710 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
711 #define umul_ppmm(w1, w0, u, v) \
712   __asm__ ("multu %2,%3"                                                \
713            : "=l" ((USItype)(w0)),                                      \
714              "=h" ((USItype)(w1))                                       \
715            : "d" ((USItype)(u)),                                        \
716              "d" ((USItype)(v)))
717 #else
718 #define umul_ppmm(w1, w0, u, v) \
719   __asm__ ("multu %2,%3
720         mflo %0
721         mfhi %1"                                                        \
722            : "=d" ((USItype)(w0)),                                      \
723              "=d" ((USItype)(w1))                                       \
724            : "d" ((USItype)(u)),                                        \
725              "d" ((USItype)(v)))
726 #endif
727 #define UMUL_TIME 10
728 #define UDIV_TIME 100
729 #endif /* __mips__ */
730
731 /***************************************
732  **************  MIPS/64  **************
733  ***************************************/
734 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
735 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
736 #define umul_ppmm(w1, w0, u, v) \
737   __asm__ ("dmultu %2,%3"                                               \
738            : "=l" ((UDItype)(w0)),                                      \
739              "=h" ((UDItype)(w1))                                       \
740            : "d" ((UDItype)(u)),                                        \
741              "d" ((UDItype)(v)))
742 #else
743 #define umul_ppmm(w1, w0, u, v) \
744   __asm__ ("dmultu %2,%3
745         mflo %0
746         mfhi %1"                                                        \
747            : "=d" ((UDItype)(w0)),                                      \
748              "=d" ((UDItype)(w1))                                       \
749            : "d" ((UDItype)(u)),                                        \
750              "d" ((UDItype)(v)))
751 #endif
752 #define UMUL_TIME 20
753 #define UDIV_TIME 140
754 #endif /* __mips__ */
755
756
757 /***************************************
758  **************  32000  ****************
759  ***************************************/
760 #if defined (__ns32000__) && W_TYPE_SIZE == 32
761 #define umul_ppmm(w1, w0, u, v) \
762   ({union {UDItype __ll;                                                \
763            struct {USItype __l, __h;} __i;                              \
764           } __xx;                                                       \
765   __asm__ ("meid %2,%0"                                                 \
766            : "=g" (__xx.__ll)                                           \
767            : "%0" ((USItype)(u)),                                       \
768              "g" ((USItype)(v)));                                       \
769   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
770 #define __umulsidi3(u, v) \
771   ({UDItype __w;                                                        \
772     __asm__ ("meid %2,%0"                                               \
773              : "=g" (__w)                                               \
774              : "%0" ((USItype)(u)),                                     \
775                "g" ((USItype)(v)));                                     \
776     __w; })
777 #define udiv_qrnnd(q, r, n1, n0, d) \
778   ({union {UDItype __ll;                                                \
779            struct {USItype __l, __h;} __i;                              \
780           } __xx;                                                       \
781   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
782   __asm__ ("deid %2,%0"                                                 \
783            : "=g" (__xx.__ll)                                           \
784            : "0" (__xx.__ll),                                           \
785              "g" ((USItype)(d)));                                       \
786   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
787 #define count_trailing_zeros(count,x) \
788   do {
789     __asm__ ("ffsd      %2,%0"                                          \
790              : "=r" ((USItype) (count))                                 \
791              : "0" ((USItype) 0),                                       \
792                "r" ((USItype) (x)));                                    \
793   } while (0)
794 #endif /* __ns32000__ */
795
796
797 /***************************************
798  **************  PPC  ******************
799  ***************************************/
800 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
801 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
802   do {                                                                  \
803     if (__builtin_constant_p (bh) && (bh) == 0)                         \
804       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
805              : "=r" ((USItype)(sh)),                                    \
806                "=&r" ((USItype)(sl))                                    \
807              : "%r" ((USItype)(ah)),                                    \
808                "%r" ((USItype)(al)),                                    \
809                "rI" ((USItype)(bl)));                                   \
810     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
811       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
812              : "=r" ((USItype)(sh)),                                    \
813                "=&r" ((USItype)(sl))                                    \
814              : "%r" ((USItype)(ah)),                                    \
815                "%r" ((USItype)(al)),                                    \
816                "rI" ((USItype)(bl)));                                   \
817     else                                                                \
818       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
819              : "=r" ((USItype)(sh)),                                    \
820                "=&r" ((USItype)(sl))                                    \
821              : "%r" ((USItype)(ah)),                                    \
822                "r" ((USItype)(bh)),                                     \
823                "%r" ((USItype)(al)),                                    \
824                "rI" ((USItype)(bl)));                                   \
825   } while (0)
826 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
827   do {                                                                  \
828     if (__builtin_constant_p (ah) && (ah) == 0)                         \
829       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
830                : "=r" ((USItype)(sh)),                                  \
831                  "=&r" ((USItype)(sl))                                  \
832                : "r" ((USItype)(bh)),                                   \
833                  "rI" ((USItype)(al)),                                  \
834                  "r" ((USItype)(bl)));                                  \
835     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
836       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
837                : "=r" ((USItype)(sh)),                                  \
838                  "=&r" ((USItype)(sl))                                  \
839                : "r" ((USItype)(bh)),                                   \
840                  "rI" ((USItype)(al)),                                  \
841                  "r" ((USItype)(bl)));                                  \
842     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
843       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
844                : "=r" ((USItype)(sh)),                                  \
845                  "=&r" ((USItype)(sl))                                  \
846                : "r" ((USItype)(ah)),                                   \
847                  "rI" ((USItype)(al)),                                  \
848                  "r" ((USItype)(bl)));                                  \
849     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
850       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
851                : "=r" ((USItype)(sh)),                                  \
852                  "=&r" ((USItype)(sl))                                  \
853                : "r" ((USItype)(ah)),                                   \
854                  "rI" ((USItype)(al)),                                  \
855                  "r" ((USItype)(bl)));                                  \
856     else                                                                \
857       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
858                : "=r" ((USItype)(sh)),                                  \
859                  "=&r" ((USItype)(sl))                                  \
860                : "r" ((USItype)(ah)),                                   \
861                  "r" ((USItype)(bh)),                                   \
862                  "rI" ((USItype)(al)),                                  \
863                  "r" ((USItype)(bl)));                                  \
864   } while (0)
865 #define count_leading_zeros(count, x) \
866   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
867            : "=r" ((USItype)(count))                                    \
868            : "r" ((USItype)(x)))
869 #define COUNT_LEADING_ZEROS_0 32
870 #if defined (_ARCH_PPC)
871 #define umul_ppmm(ph, pl, m0, m1) \
872   do {                                                                  \
873     USItype __m0 = (m0), __m1 = (m1);                                   \
874     __asm__ ("mulhwu %0,%1,%2"                                          \
875              : "=r" ((USItype) ph)                                      \
876              : "%r" (__m0),                                             \
877                "r" (__m1));                                             \
878     (pl) = __m0 * __m1;                                                 \
879   } while (0)
880 #define UMUL_TIME 15
881 #define smul_ppmm(ph, pl, m0, m1) \
882   do {                                                                  \
883     SItype __m0 = (m0), __m1 = (m1);                                    \
884     __asm__ ("mulhw %0,%1,%2"                                           \
885              : "=r" ((SItype) ph)                                       \
886              : "%r" (__m0),                                             \
887                "r" (__m1));                                             \
888     (pl) = __m0 * __m1;                                                 \
889   } while (0)
890 #define SMUL_TIME 14
891 #define UDIV_TIME 120
892 #else
893 #define umul_ppmm(xh, xl, m0, m1) \
894   do {                                                                  \
895     USItype __m0 = (m0), __m1 = (m1);                                   \
896     __asm__ ("mul %0,%2,%3"                                             \
897              : "=r" ((USItype)(xh)),                                    \
898                "=q" ((USItype)(xl))                                     \
899              : "r" (__m0),                                              \
900                "r" (__m1));                                             \
901     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
902              + (((SItype) __m1 >> 31) & __m0));                         \
903   } while (0)
904 #define UMUL_TIME 8
905 #define smul_ppmm(xh, xl, m0, m1) \
906   __asm__ ("mul %0,%2,%3"                                               \
907            : "=r" ((SItype)(xh)),                                       \
908              "=q" ((SItype)(xl))                                        \
909            : "r" (m0),                                                  \
910              "r" (m1))
911 #define SMUL_TIME 4
912 #define sdiv_qrnnd(q, r, nh, nl, d) \
913   __asm__ ("div %0,%2,%4"                                               \
914            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
915            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
916 #define UDIV_TIME 100
917 #endif
918 #endif /* Power architecture variants.  */
919
920
921 /***************************************
922  **************  PYR  ******************
923  ***************************************/
924 #if defined (__pyr__) && W_TYPE_SIZE == 32
925 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
926   __asm__ ("addw        %5,%1
927         addwc   %3,%0"                                                  \
928            : "=r" ((USItype)(sh)),                                      \
929              "=&r" ((USItype)(sl))                                      \
930            : "%0" ((USItype)(ah)),                                      \
931              "g" ((USItype)(bh)),                                       \
932              "%1" ((USItype)(al)),                                      \
933              "g" ((USItype)(bl)))
934 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
935   __asm__ ("subw        %5,%1
936         subwb   %3,%0"                                                  \
937            : "=r" ((USItype)(sh)),                                      \
938              "=&r" ((USItype)(sl))                                      \
939            : "0" ((USItype)(ah)),                                       \
940              "g" ((USItype)(bh)),                                       \
941              "1" ((USItype)(al)),                                       \
942              "g" ((USItype)(bl)))
943 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
944 #define umul_ppmm(w1, w0, u, v) \
945   ({union {UDItype __ll;                                                \
946            struct {USItype __h, __l;} __i;                              \
947           } __xx;                                                       \
948   __asm__ ("movw %1,%R0
949         uemul %2,%0"                                                    \
950            : "=&r" (__xx.__ll)                                          \
951            : "g" ((USItype) (u)),                                       \
952              "g" ((USItype)(v)));                                       \
953   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
954 #endif /* __pyr__ */
955
956
957 /***************************************
958  **************  RT/ROMP  **************
959  ***************************************/
960 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
961 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
962   __asm__ ("a %1,%5
963         ae %0,%3"                                                       \
964            : "=r" ((USItype)(sh)),                                      \
965              "=&r" ((USItype)(sl))                                      \
966            : "%0" ((USItype)(ah)),                                      \
967              "r" ((USItype)(bh)),                                       \
968              "%1" ((USItype)(al)),                                      \
969              "r" ((USItype)(bl)))
970 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
971   __asm__ ("s %1,%5
972         se %0,%3"                                                       \
973            : "=r" ((USItype)(sh)),                                      \
974              "=&r" ((USItype)(sl))                                      \
975            : "0" ((USItype)(ah)),                                       \
976              "r" ((USItype)(bh)),                                       \
977              "1" ((USItype)(al)),                                       \
978              "r" ((USItype)(bl)))
979 #define umul_ppmm(ph, pl, m0, m1) \
980   do {                                                                  \
981     USItype __m0 = (m0), __m1 = (m1);                                   \
982     __asm__ (                                                           \
983        "s       r2,r2
984         mts     r10,%2
985         m       r2,%3
986         m       r2,%3
987         m       r2,%3
988         m       r2,%3
989         m       r2,%3
990         m       r2,%3
991         m       r2,%3
992         m       r2,%3
993         m       r2,%3
994         m       r2,%3
995         m       r2,%3
996         m       r2,%3
997         m       r2,%3
998         m       r2,%3
999         m       r2,%3
1000         m       r2,%3
1001         cas     %0,r2,r0
1002         mfs     r10,%1"                                                 \
1003              : "=r" ((USItype)(ph)),                                    \
1004                "=r" ((USItype)(pl))                                     \
1005              : "%r" (__m0),                                             \
1006                 "r" (__m1)                                              \
1007              : "r2");                                                   \
1008     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
1009              + (((SItype) __m1 >> 31) & __m0));                         \
1010   } while (0)
1011 #define UMUL_TIME 20
1012 #define UDIV_TIME 200
1013 #define count_leading_zeros(count, x) \
1014   do {                                                                  \
1015     if ((x) >= 0x10000)                                                 \
1016       __asm__ ("clz     %0,%1"                                          \
1017                : "=r" ((USItype)(count))                                \
1018                : "r" ((USItype)(x) >> 16));                             \
1019     else                                                                \
1020       {                                                                 \
1021         __asm__ ("clz   %0,%1"                                          \
1022                  : "=r" ((USItype)(count))                              \
1023                  : "r" ((USItype)(x)));                                 \
1024         (count) += 16;                                                  \
1025       }                                                                 \
1026   } while (0)
1027 #endif /* RT/ROMP */
1028
1029
1030 /***************************************
1031  **************  SH2  ******************
1032  ***************************************/
1033 #if defined (__sh2__) && W_TYPE_SIZE == 32
1034 #define umul_ppmm(w1, w0, u, v) \
1035   __asm__ (                                                             \
1036        "dmulu.l %2,%3
1037         sts     macl,%1
1038         sts     mach,%0"                                                \
1039            : "=r" ((USItype)(w1)),                                      \
1040              "=r" ((USItype)(w0))                                       \
1041            : "r" ((USItype)(u)),                                        \
1042              "r" ((USItype)(v))                                         \
1043            : "macl", "mach")
1044 #define UMUL_TIME 5
1045 #endif
1046
1047 /***************************************
1048  **************  SPARC  ****************
1049  ***************************************/
1050 #if defined (__sparc__) && W_TYPE_SIZE == 32
1051 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1052   __asm__ ("addcc %r4,%5,%1
1053         addx %r2,%3,%0"                                                 \
1054            : "=r" ((USItype)(sh)),                                      \
1055              "=&r" ((USItype)(sl))                                      \
1056            : "%rJ" ((USItype)(ah)),                                     \
1057              "rI" ((USItype)(bh)),                                      \
1058              "%rJ" ((USItype)(al)),                                     \
1059              "rI" ((USItype)(bl))                                       \
1060            __CLOBBER_CC)
1061 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1062   __asm__ ("subcc %r4,%5,%1
1063         subx %r2,%3,%0"                                                 \
1064            : "=r" ((USItype)(sh)),                                      \
1065              "=&r" ((USItype)(sl))                                      \
1066            : "rJ" ((USItype)(ah)),                                      \
1067              "rI" ((USItype)(bh)),                                      \
1068              "rJ" ((USItype)(al)),                                      \
1069              "rI" ((USItype)(bl))                                       \
1070            __CLOBBER_CC)
1071 #if defined (__sparc_v8__)
1072 /* Don't match immediate range because, 1) it is not often useful,
1073    2) the 'I' flag thinks of the range as a 13 bit signed interval,
1074    while we want to match a 13 bit interval, sign extended to 32 bits,
1075    but INTERPRETED AS UNSIGNED.  */
1076 #define umul_ppmm(w1, w0, u, v) \
1077   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1078            : "=r" ((USItype)(w1)),                                      \
1079              "=r" ((USItype)(w0))                                       \
1080            : "r" ((USItype)(u)),                                        \
1081              "r" ((USItype)(v)))
1082 #define UMUL_TIME 5
1083 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
1084 #define udiv_qrnnd(q, r, n1, n0, d) \
1085   do {                                                                  \
1086     USItype __q;                                                        \
1087     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1088              : "=r" ((USItype)(__q))                                    \
1089              : "r" ((USItype)(n1)),                                     \
1090                "r" ((USItype)(n0)),                                     \
1091                "r" ((USItype)(d)));                                     \
1092     (r) = (n0) - __q * (d);                                             \
1093     (q) = __q;                                                          \
1094   } while (0)
1095 #define UDIV_TIME 25
1096 #endif /* SUPERSPARC */
1097 #else /* ! __sparc_v8__ */
1098 #if defined (__sparclite__)
1099 /* This has hardware multiply but not divide.  It also has two additional
1100    instructions scan (ffs from high bit) and divscc.  */
1101 #define umul_ppmm(w1, w0, u, v) \
1102   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1103            : "=r" ((USItype)(w1)),                                      \
1104              "=r" ((USItype)(w0))                                       \
1105            : "r" ((USItype)(u)),                                        \
1106              "r" ((USItype)(v)))
1107 #define UMUL_TIME 5
1108 #define udiv_qrnnd(q, r, n1, n0, d) \
1109   __asm__ ("! Inlined udiv_qrnnd
1110         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
1111         tst     %%g0
1112         divscc  %3,%4,%%g1
1113         divscc  %%g1,%4,%%g1
1114         divscc  %%g1,%4,%%g1
1115         divscc  %%g1,%4,%%g1
1116         divscc  %%g1,%4,%%g1
1117         divscc  %%g1,%4,%%g1
1118         divscc  %%g1,%4,%%g1
1119         divscc  %%g1,%4,%%g1
1120         divscc  %%g1,%4,%%g1
1121         divscc  %%g1,%4,%%g1
1122         divscc  %%g1,%4,%%g1
1123         divscc  %%g1,%4,%%g1
1124         divscc  %%g1,%4,%%g1
1125         divscc  %%g1,%4,%%g1
1126         divscc  %%g1,%4,%%g1
1127         divscc  %%g1,%4,%%g1
1128         divscc  %%g1,%4,%%g1
1129         divscc  %%g1,%4,%%g1
1130         divscc  %%g1,%4,%%g1
1131         divscc  %%g1,%4,%%g1
1132         divscc  %%g1,%4,%%g1
1133         divscc  %%g1,%4,%%g1
1134         divscc  %%g1,%4,%%g1
1135         divscc  %%g1,%4,%%g1
1136         divscc  %%g1,%4,%%g1
1137         divscc  %%g1,%4,%%g1
1138         divscc  %%g1,%4,%%g1
1139         divscc  %%g1,%4,%%g1
1140         divscc  %%g1,%4,%%g1
1141         divscc  %%g1,%4,%%g1
1142         divscc  %%g1,%4,%%g1
1143         divscc  %%g1,%4,%0
1144         rd      %%y,%1
1145         bl,a 1f
1146         add     %1,%4,%1
1147 1:      ! End of inline udiv_qrnnd"                                     \
1148            : "=r" ((USItype)(q)),                                       \
1149              "=r" ((USItype)(r))                                        \
1150            : "r" ((USItype)(n1)),                                       \
1151              "r" ((USItype)(n0)),                                       \
1152              "rI" ((USItype)(d))                                        \
1153            : "%g1" __AND_CLOBBER_CC)
1154 #define UDIV_TIME 37
1155 #define count_leading_zeros(count, x) \
1156   __asm__ ("scan %1,0,%0"                                               \
1157            : "=r" ((USItype)(x))                                        \
1158            : "r" ((USItype)(count)))
1159 /* Early sparclites return 63 for an argument of 0, but they warn that future
1160    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1161    undefined.  */
1162 #endif /* __sparclite__ */
1163 #endif /* __sparc_v8__ */
1164 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1165 #ifndef umul_ppmm
1166 #define umul_ppmm(w1, w0, u, v) \
1167   __asm__ ("! Inlined umul_ppmm
1168         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1169         sra     %3,31,%%g2      ! Don't move this insn
1170         and     %2,%%g2,%%g2    ! Don't move this insn
1171         andcc   %%g0,0,%%g1     ! Don't move this insn
1172         mulscc  %%g1,%3,%%g1
1173         mulscc  %%g1,%3,%%g1
1174         mulscc  %%g1,%3,%%g1
1175         mulscc  %%g1,%3,%%g1
1176         mulscc  %%g1,%3,%%g1
1177         mulscc  %%g1,%3,%%g1
1178         mulscc  %%g1,%3,%%g1
1179         mulscc  %%g1,%3,%%g1
1180         mulscc  %%g1,%3,%%g1
1181         mulscc  %%g1,%3,%%g1
1182         mulscc  %%g1,%3,%%g1
1183         mulscc  %%g1,%3,%%g1
1184         mulscc  %%g1,%3,%%g1
1185         mulscc  %%g1,%3,%%g1
1186         mulscc  %%g1,%3,%%g1
1187         mulscc  %%g1,%3,%%g1
1188         mulscc  %%g1,%3,%%g1
1189         mulscc  %%g1,%3,%%g1
1190         mulscc  %%g1,%3,%%g1
1191         mulscc  %%g1,%3,%%g1
1192         mulscc  %%g1,%3,%%g1
1193         mulscc  %%g1,%3,%%g1
1194         mulscc  %%g1,%3,%%g1
1195         mulscc  %%g1,%3,%%g1
1196         mulscc  %%g1,%3,%%g1
1197         mulscc  %%g1,%3,%%g1
1198         mulscc  %%g1,%3,%%g1
1199         mulscc  %%g1,%3,%%g1
1200         mulscc  %%g1,%3,%%g1
1201         mulscc  %%g1,%3,%%g1
1202         mulscc  %%g1,%3,%%g1
1203         mulscc  %%g1,%3,%%g1
1204         mulscc  %%g1,0,%%g1
1205         add     %%g1,%%g2,%0
1206         rd      %%y,%1"                                                 \
1207            : "=r" ((USItype)(w1)),                                      \
1208              "=r" ((USItype)(w0))                                       \
1209            : "%rI" ((USItype)(u)),                                      \
1210              "r" ((USItype)(v))                                         \
1211            : "%g1", "%g2" __AND_CLOBBER_CC)
1212 #define UMUL_TIME 39            /* 39 instructions */
1213 #endif
1214 #ifndef udiv_qrnnd
1215 #ifndef LONGLONG_STANDALONE
1216 #define udiv_qrnnd(q, r, n1, n0, d) \
1217   do { USItype __r;                                                     \
1218     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
1219     (r) = __r;                                                          \
1220   } while (0)
1221 extern USItype __udiv_qrnnd ();
1222 #define UDIV_TIME 140
1223 #endif /* LONGLONG_STANDALONE */
1224 #endif /* udiv_qrnnd */
1225 #endif /* __sparc__ */
1226
1227
1228 /***************************************
1229  **************  VAX  ******************
1230  ***************************************/
1231 #if defined (__vax__) && W_TYPE_SIZE == 32
1232 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1233   __asm__ ("addl2 %5,%1
1234         adwc %3,%0"                                                     \
1235            : "=g" ((USItype)(sh)),                                      \
1236              "=&g" ((USItype)(sl))                                      \
1237            : "%0" ((USItype)(ah)),                                      \
1238              "g" ((USItype)(bh)),                                       \
1239              "%1" ((USItype)(al)),                                      \
1240              "g" ((USItype)(bl)))
1241 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1242   __asm__ ("subl2 %5,%1
1243         sbwc %3,%0"                                                     \
1244            : "=g" ((USItype)(sh)),                                      \
1245              "=&g" ((USItype)(sl))                                      \
1246            : "0" ((USItype)(ah)),                                       \
1247              "g" ((USItype)(bh)),                                       \
1248              "1" ((USItype)(al)),                                       \
1249              "g" ((USItype)(bl)))
1250 #define umul_ppmm(xh, xl, m0, m1) \
1251   do {                                                                  \
1252     union {UDItype __ll;                                                \
1253            struct {USItype __l, __h;} __i;                              \
1254           } __xx;                                                       \
1255     USItype __m0 = (m0), __m1 = (m1);                                   \
1256     __asm__ ("emul %1,%2,$0,%0"                                         \
1257              : "=g" (__xx.__ll)                                         \
1258              : "g" (__m0),                                              \
1259                "g" (__m1));                                             \
1260     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1261     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1262              + (((SItype) __m1 >> 31) & __m0));                         \
1263   } while (0)
1264 #define sdiv_qrnnd(q, r, n1, n0, d) \
1265   do {                                                                  \
1266     union {DItype __ll;                                                 \
1267            struct {SItype __l, __h;} __i;                               \
1268           } __xx;                                                       \
1269     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1270     __asm__ ("ediv %3,%2,%0,%1"                                         \
1271              : "=g" (q), "=g" (r)                                       \
1272              : "g" (__xx.__ll), "g" (d));                               \
1273   } while (0)
1274 #endif /* __vax__ */
1275
1276
1277 /***************************************
1278  **************  Z8000  ****************
1279  ***************************************/
1280 #if defined (__z8000__) && W_TYPE_SIZE == 16
1281 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1282   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1283            : "=r" ((unsigned int)(sh)),                                 \
1284              "=&r" ((unsigned int)(sl))                                 \
1285            : "%0" ((unsigned int)(ah)),                                 \
1286              "r" ((unsigned int)(bh)),                                  \
1287              "%1" ((unsigned int)(al)),                                 \
1288              "rQR" ((unsigned int)(bl)))
1289 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1290   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1291            : "=r" ((unsigned int)(sh)),                                 \
1292              "=&r" ((unsigned int)(sl))                                 \
1293            : "0" ((unsigned int)(ah)),                                  \
1294              "r" ((unsigned int)(bh)),                                  \
1295              "1" ((unsigned int)(al)),                                  \
1296              "rQR" ((unsigned int)(bl)))
1297 #define umul_ppmm(xh, xl, m0, m1) \
1298   do {                                                                  \
1299     union {long int __ll;                                               \
1300            struct {unsigned int __h, __l;} __i;                         \
1301           } __xx;                                                       \
1302     unsigned int __m0 = (m0), __m1 = (m1);                              \
1303     __asm__ ("mult      %S0,%H3"                                        \
1304              : "=r" (__xx.__i.__h),                                     \
1305                "=r" (__xx.__i.__l)                                      \
1306              : "%1" (__m0),                                             \
1307                "rQR" (__m1));                                           \
1308     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1309     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1310              + (((signed int) __m1 >> 15) & __m0));                     \
1311   } while (0)
1312 #endif /* __z8000__ */
1313
1314 #endif /* __GNUC__ */
1315
1316
1317 /***************************************
1318  ***********  Generic Versions  ********
1319  ***************************************/
1320 #if !defined (umul_ppmm) && defined (__umulsidi3)
1321 #define umul_ppmm(ph, pl, m0, m1) \
1322   {                                                                     \
1323     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1324     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1325     pl = (UWtype) __ll;                                                 \
1326   }
1327 #endif
1328
1329 #if !defined (__umulsidi3)
1330 #define __umulsidi3(u, v) \
1331   ({UWtype __hi, __lo;                                                  \
1332     umul_ppmm (__hi, __lo, u, v);                                       \
1333     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1334 #endif
1335
1336 /* If this machine has no inline assembler, use C macros.  */
1337
1338 #if !defined (add_ssaaaa)
1339 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1340   do {                                                                  \
1341     UWtype __x;                                                         \
1342     __x = (al) + (bl);                                                  \
1343     (sh) = (ah) + (bh) + (__x < (al));                                  \
1344     (sl) = __x;                                                         \
1345   } while (0)
1346 #endif
1347
1348 #if !defined (sub_ddmmss)
1349 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1350   do {                                                                  \
1351     UWtype __x;                                                         \
1352     __x = (al) - (bl);                                                  \
1353     (sh) = (ah) - (bh) - (__x > (al));                                  \
1354     (sl) = __x;                                                         \
1355   } while (0)
1356 #endif
1357
1358 #if !defined (umul_ppmm)
1359 #define umul_ppmm(w1, w0, u, v)                                         \
1360   do {                                                                  \
1361     UWtype __x0, __x1, __x2, __x3;                                      \
1362     UHWtype __ul, __vl, __uh, __vh;                                     \
1363     UWtype __u = (u), __v = (v);                                        \
1364                                                                         \
1365     __ul = __ll_lowpart (__u);                                          \
1366     __uh = __ll_highpart (__u);                                         \
1367     __vl = __ll_lowpart (__v);                                          \
1368     __vh = __ll_highpart (__v);                                         \
1369                                                                         \
1370     __x0 = (UWtype) __ul * __vl;                                        \
1371     __x1 = (UWtype) __ul * __vh;                                        \
1372     __x2 = (UWtype) __uh * __vl;                                        \
1373     __x3 = (UWtype) __uh * __vh;                                        \
1374                                                                         \
1375     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1376     __x1 += __x2;               /* but this indeed can */               \
1377     if (__x1 < __x2)            /* did we get it? */                    \
1378       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1379                                                                         \
1380     (w1) = __x3 + __ll_highpart (__x1);                                 \
1381     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1382   } while (0)
1383 #endif
1384
1385 #if !defined (umul_ppmm)
1386 #define smul_ppmm(w1, w0, u, v)                                         \
1387   do {                                                                  \
1388     UWtype __w1;                                                        \
1389     UWtype __m0 = (u), __m1 = (v);                                      \
1390     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1391     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1392                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1393   } while (0)
1394 #endif
1395
1396 /* Define this unconditionally, so it can be used for debugging.  */
1397 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1398   do {                                                                  \
1399     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1400     __d1 = __ll_highpart (d);                                           \
1401     __d0 = __ll_lowpart (d);                                            \
1402                                                                         \
1403     __r1 = (n1) % __d1;                                                 \
1404     __q1 = (n1) / __d1;                                                 \
1405     __m = (UWtype) __q1 * __d0;                                         \
1406     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1407     if (__r1 < __m)                                                     \
1408       {                                                                 \
1409         __q1--, __r1 += (d);                                            \
1410         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1411           if (__r1 < __m)                                               \
1412             __q1--, __r1 += (d);                                        \
1413       }                                                                 \
1414     __r1 -= __m;                                                        \
1415                                                                         \
1416     __r0 = __r1 % __d1;                                                 \
1417     __q0 = __r1 / __d1;                                                 \
1418     __m = (UWtype) __q0 * __d0;                                         \
1419     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1420     if (__r0 < __m)                                                     \
1421       {                                                                 \
1422         __q0--, __r0 += (d);                                            \
1423         if (__r0 >= (d))                                                \
1424           if (__r0 < __m)                                               \
1425             __q0--, __r0 += (d);                                        \
1426       }                                                                 \
1427     __r0 -= __m;                                                        \
1428                                                                         \
1429     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1430     (r) = __r0;                                                         \
1431   } while (0)
1432
1433 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1434    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1435 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1436 #define udiv_qrnnd(q, r, nh, nl, d) \
1437   do {                                                                  \
1438     UWtype __r;                                                         \
1439     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1440     (r) = __r;                                                          \
1441   } while (0)
1442 #endif
1443
1444 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1445 #if !defined (udiv_qrnnd)
1446 #define UDIV_NEEDS_NORMALIZATION 1
1447 #define udiv_qrnnd __udiv_qrnnd_c
1448 #endif
1449
1450 #if !defined (count_leading_zeros)
1451 extern
1452 #ifdef __STDC__
1453 const
1454 #endif
1455 unsigned char __clz_tab[];
1456 #define MPI_INTERNAL_NEED_CLZ_TAB 1
1457 #define count_leading_zeros(count, x) \
1458   do {                                                                  \
1459     UWtype __xr = (x);                                                  \
1460     UWtype __a;                                                         \
1461                                                                         \
1462     if (W_TYPE_SIZE <= 32)                                              \
1463       {                                                                 \
1464         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1465           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1466           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1467       }                                                                 \
1468     else                                                                \
1469       {                                                                 \
1470         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1471           if (((__xr >> __a) & 0xff) != 0)                              \
1472             break;                                                      \
1473       }                                                                 \
1474                                                                         \
1475     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1476   } while (0)
1477 /* This version gives a well-defined value for zero. */
1478 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1479 #endif
1480
1481 #if !defined (count_trailing_zeros)
1482 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1483    defined in asm, but if it is not, the C version above is good enough.  */
1484 #define count_trailing_zeros(count, x) \
1485   do {                                                                  \
1486     UWtype __ctz_x = (x);                                               \
1487     UWtype __ctz_c;                                                     \
1488     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1489     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1490   } while (0)
1491 #endif
1492
1493 #ifndef UDIV_NEEDS_NORMALIZATION
1494 #define UDIV_NEEDS_NORMALIZATION 0
1495 #endif