rijndael-ssse3-amd64: fix building on x32
authorJussi Kivilinna <jussi.kivilinna@iki.fi>
Mon, 23 Jan 2017 18:01:32 +0000 (20:01 +0200)
committerJussi Kivilinna <jussi.kivilinna@iki.fi>
Mon, 23 Jan 2017 18:14:57 +0000 (20:14 +0200)
* cipher/rijndael-ssse3-amd64.c: Use 64-bit call instructions
with 64-bit registers.
--

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
cipher/rijndael-ssse3-amd64.c

index 25d1849..78d8234 100644 (file)
@@ -128,14 +128,14 @@ extern void _gcry_aes_ssse3_decrypt_core(void);
 
 #define vpaes_ssse3_prepare_enc() \
     vpaes_ssse3_prepare(); \
-    asm volatile ("call *%[core] \n\t" \
+    asm volatile ("callq *%q[core] \n\t" \
                   : \
                   : [core] "r" (_gcry_aes_ssse3_enc_preload) \
                   : "rax", "cc", "memory" )
 
 #define vpaes_ssse3_prepare_dec() \
     vpaes_ssse3_prepare(); \
-    asm volatile ("call *%[core] \n\t" \
+    asm volatile ("callq *%q[core] \n\t" \
                   : \
                   : [core] "r" (_gcry_aes_ssse3_dec_preload) \
                   : "rax", "cc", "memory" )
@@ -155,7 +155,7 @@ _gcry_aes_ssse3_do_setkey (RIJNDAEL_context *ctx, const byte *key)
                 "leaq %[buf], %%rdx"                   "\n\t"
                 "movl %[dir], %%ecx"                   "\n\t"
                 "movl %[rotoffs], %%r8d"               "\n\t"
-                "call *%[core]"                                "\n\t"
+                "callq *%q[core]"                      "\n\t"
                 :
                 : [core] "r" (&_gcry_aes_ssse3_schedule_core),
                   [key] "m" (*key),
@@ -208,7 +208,7 @@ _gcry_aes_ssse3_prepare_decryption (RIJNDAEL_context *ctx)
                 "leaq %[buf], %%rdx"                   "\n\t"
                 "movl %[dir], %%ecx"                   "\n\t"
                 "movl %[rotoffs], %%r8d"               "\n\t"
-                "call *%[core]"                                "\n\t"
+                "callq *%q[core]"                      "\n\t"
                 :
                 : [core] "r" (_gcry_aes_ssse3_schedule_core),
                   [key] "m" (ctx->keyschdec32[0][0]),
@@ -231,7 +231,7 @@ do_vpaes_ssse3_enc (const RIJNDAEL_context *ctx, unsigned int nrounds)
   unsigned int middle_rounds = nrounds - 1;
   const void *keysched = ctx->keyschenc32;
 
-  asm volatile ("call *%[core]"                                "\n\t"
+  asm volatile ("callq *%q[core]"                      "\n\t"
                : "+a" (middle_rounds), "+d" (keysched)
                : [core] "r" (_gcry_aes_ssse3_encrypt_core)
                : "rcx", "rsi", "rdi", "cc", "memory");
@@ -246,7 +246,7 @@ do_vpaes_ssse3_dec (const RIJNDAEL_context *ctx, unsigned int nrounds)
   unsigned int middle_rounds = nrounds - 1;
   const void *keysched = ctx->keyschdec32;
 
-  asm volatile ("call *%[core]"                                "\n\t"
+  asm volatile ("callq *%q[core]"                      "\n\t"
                 : "+a" (middle_rounds), "+d" (keysched)
                : [core] "r" (_gcry_aes_ssse3_decrypt_core)
                 : "rcx", "rsi", "cc", "memory");