* README.W32: Adjusted some descriptions. Fixed the regsitry
[gnupg.git] / mpi / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2    Note: I added some stuff for use with gnupg
3
4 Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998,
5               2000, 2001 Free Software Foundation, Inc.
6
7 This file is free software; you can redistribute it and/or modify
8 it under the terms of the GNU Library General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or (at your
10 option) any later version.
11
12 This file is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
15 License for more details.
16
17 You should have received a copy of the GNU Library General Public License
18 along with this file; see the file COPYING.LIB.  If not, write to
19 the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 MA 02111-1307, USA. */
21
22 /* You have to define the following before including this file:
23
24    UWtype -- An unsigned type, default type for operations (typically a "word")
25    UHWtype -- An unsigned type, at least half the size of UWtype.
26    UDWtype -- An unsigned type, at least twice as large a UWtype
27    W_TYPE_SIZE -- size in bits of UWtype
28
29    SItype, USItype -- Signed and unsigned 32 bit types.
30    DItype, UDItype -- Signed and unsigned 64 bit types.
31
32    On a 32 bit machine UWtype should typically be USItype;
33    on a 64 bit machine, UWtype should typically be UDItype.
34 */
35
36 #define __BITS4 (W_TYPE_SIZE / 4)
37 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
38 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
39 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
40
41 /* This is used to make sure no undesirable sharing between different libraries
42    that use this file takes place.  */
43 #ifndef __MPN
44 #define __MPN(x) __##x
45 #endif
46
47 /* Define auxiliary asm macros.
48
49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
51    word product in HIGH_PROD and LOW_PROD.
52
53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
54    UDWtype product.  This is just a variant of umul_ppmm.
55
56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
57    denominator) divides a UDWtype, composed by the UWtype integers
58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
60    than DENOMINATOR for correct operation.  If, in addition, the most
61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
62    UDIV_NEEDS_NORMALIZATION is defined to 1.
63
64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
66    is rounded towards 0.
67
68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
69    msb to the first non-zero bit in the UWtype X.  This is the number of
70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
72
73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
74    from the least significant end.
75
76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
80    (i.e. carry out) is not stored anywhere, and is lost.
81
82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
87    and is lost.
88
89    If any of these macros are left undefined for a particular CPU,
90    C macros are used.  */
91
92 /* The CPUs come in alphabetical order below.
93
94    Please add support for more CPUs here, or improve the current support
95    for the CPUs below!  */
96
97 #ifdef __riscos__
98 #pragma continue_after_hash_error
99 #else /* !__riscos__ */
100 #if defined (__GNUC__) && !defined (NO_ASM)
101
102 /* We sometimes need to clobber "cc" with gcc2, but that would not be
103    understood by gcc1.  Use cpp to avoid major code duplication.  */
104 #if __GNUC__ < 2
105 #define __CLOBBER_CC
106 #define __AND_CLOBBER_CC
107 #else /* __GNUC__ >= 2 */
108 #define __CLOBBER_CC : "cc"
109 #define __AND_CLOBBER_CC , "cc"
110 #endif /* __GNUC__ < 2 */
111
112
113 /***************************************
114  **************  A29K  *****************
115  ***************************************/
116 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
117 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
118   __asm__ ("add %1,%4,%5
119         addc %0,%2,%3"                                                  \
120            : "=r" ((USItype)(sh)),                                      \
121             "=&r" ((USItype)(sl))                                       \
122            : "%r" ((USItype)(ah)),                                      \
123              "rI" ((USItype)(bh)),                                      \
124              "%r" ((USItype)(al)),                                      \
125              "rI" ((USItype)(bl)))
126 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
127   __asm__ ("sub %1,%4,%5
128         subc %0,%2,%3"                                                  \
129            : "=r" ((USItype)(sh)),                                      \
130              "=&r" ((USItype)(sl))                                      \
131            : "r" ((USItype)(ah)),                                       \
132              "rI" ((USItype)(bh)),                                      \
133              "r" ((USItype)(al)),                                       \
134              "rI" ((USItype)(bl)))
135 #define umul_ppmm(xh, xl, m0, m1) \
136   do {                                                                  \
137     USItype __m0 = (m0), __m1 = (m1);                                   \
138     __asm__ ("multiplu %0,%1,%2"                                        \
139              : "=r" ((USItype)(xl))                                     \
140              : "r" (__m0),                                              \
141                "r" (__m1));                                             \
142     __asm__ ("multmu %0,%1,%2"                                          \
143              : "=r" ((USItype)(xh))                                     \
144              : "r" (__m0),                                              \
145                "r" (__m1));                                             \
146   } while (0)
147 #define udiv_qrnnd(q, r, n1, n0, d) \
148   __asm__ ("dividu %0,%3,%4"                                            \
149            : "=r" ((USItype)(q)),                                       \
150              "=q" ((USItype)(r))                                        \
151            : "1" ((USItype)(n1)),                                       \
152              "r" ((USItype)(n0)),                                       \
153              "r" ((USItype)(d)))
154 #define count_leading_zeros(count, x) \
155     __asm__ ("clz %0,%1"                                                \
156              : "=r" ((USItype)(count))                                  \
157              : "r" ((USItype)(x)))
158 #define COUNT_LEADING_ZEROS_0 32
159 #endif /* __a29k__ */
160
161
162 #if defined (__alpha) && W_TYPE_SIZE == 64
163 #define umul_ppmm(ph, pl, m0, m1) \
164   do {                                                                  \
165     UDItype __m0 = (m0), __m1 = (m1);                                   \
166     __asm__ ("umulh %r1,%2,%0"                                          \
167              : "=r" ((UDItype) ph)                                      \
168              : "%rJ" (__m0),                                            \
169                "rI" (__m1));                                            \
170     (pl) = __m0 * __m1;                                                 \
171   } while (0)
172 #define UMUL_TIME 46
173 #ifndef LONGLONG_STANDALONE
174 #define udiv_qrnnd(q, r, n1, n0, d) \
175   do { UDItype __r;                                                     \
176     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
177     (r) = __r;                                                          \
178   } while (0)
179 extern UDItype __udiv_qrnnd ();
180 #define UDIV_TIME 220
181 #endif /* LONGLONG_STANDALONE */
182 #endif /* __alpha */
183
184 /***************************************
185  **************  ARM  ******************
186  ***************************************/
187 #if defined (__arm__) && W_TYPE_SIZE == 32
188 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
189   __asm__ ("adds        %1, %4, %5
190         adc     %0, %2, %3"                                             \
191            : "=r" ((USItype)(sh)),                                      \
192              "=&r" ((USItype)(sl))                                      \
193            : "%r" ((USItype)(ah)),                                      \
194              "rI" ((USItype)(bh)),                                      \
195              "%r" ((USItype)(al)),                                      \
196              "rI" ((USItype)(bl)))
197 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
198   __asm__ ("subs        %1, %4, %5
199         sbc     %0, %2, %3"                                             \
200            : "=r" ((USItype)(sh)),                                      \
201              "=&r" ((USItype)(sl))                                      \
202            : "r" ((USItype)(ah)),                                       \
203              "rI" ((USItype)(bh)),                                      \
204              "r" ((USItype)(al)),                                       \
205              "rI" ((USItype)(bl)))
206 #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__
207 #define umul_ppmm(xh, xl, a, b) \
208   __asm__ ("%@ Inlined umul_ppmm
209         mov     %|r0, %2, lsr #16               @ AAAA
210         mov     %|r2, %3, lsr #16               @ BBBB
211         bic     %|r1, %2, %|r0, lsl #16         @ aaaa
212         bic     %0, %3, %|r2, lsl #16           @ bbbb
213         mul     %1, %|r1, %|r2                  @ aaaa * BBBB
214         mul     %|r2, %|r0, %|r2                @ AAAA * BBBB
215         mul     %|r1, %0, %|r1                  @ aaaa * bbbb
216         mul     %0, %|r0, %0                    @ AAAA * bbbb
217         adds    %|r0, %1, %0                    @ central sum
218         addcs   %|r2, %|r2, #65536
219         adds    %1, %|r1, %|r0, lsl #16
220         adc     %0, %|r2, %|r0, lsr #16"                                \
221            : "=&r" ((USItype)(xh)),                                     \
222              "=r" ((USItype)(xl))                                       \
223            : "r" ((USItype)(a)),                                        \
224              "r" ((USItype)(b))                                         \
225            : "r0", "r1", "r2")
226 #else
227 #define umul_ppmm(xh, xl, a, b) \
228   __asm__ ("%@ Inlined umul_ppmm
229         umull   %r1, %r0, %r2, %r3" \
230                    : "=&r" ((USItype)(xh)), \
231                      "=r" ((USItype)(xl)) \
232                    : "r" ((USItype)(a)), \
233                      "r" ((USItype)(b)) \
234                    : "r0", "r1")
235 #endif
236 #define UMUL_TIME 20
237 #define UDIV_TIME 100
238 #endif /* __arm__ */
239
240 /***************************************
241  **************  CLIPPER  **************
242  ***************************************/
243 #if defined (__clipper__) && W_TYPE_SIZE == 32
244 #define umul_ppmm(w1, w0, u, v) \
245   ({union {UDItype __ll;                                                \
246            struct {USItype __l, __h;} __i;                              \
247           } __xx;                                                       \
248   __asm__ ("mulwux %2,%0"                                               \
249            : "=r" (__xx.__ll)                                           \
250            : "%0" ((USItype)(u)),                                       \
251              "r" ((USItype)(v)));                                       \
252   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
253 #define smul_ppmm(w1, w0, u, v) \
254   ({union {DItype __ll;                                                 \
255            struct {SItype __l, __h;} __i;                               \
256           } __xx;                                                       \
257   __asm__ ("mulwx %2,%0"                                                \
258            : "=r" (__xx.__ll)                                           \
259            : "%0" ((SItype)(u)),                                        \
260              "r" ((SItype)(v)));                                        \
261   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
262 #define __umulsidi3(u, v) \
263   ({UDItype __w;                                                        \
264     __asm__ ("mulwux %2,%0"                                             \
265              : "=r" (__w)                                               \
266              : "%0" ((USItype)(u)),                                     \
267                "r" ((USItype)(v)));                                     \
268     __w; })
269 #endif /* __clipper__ */
270
271
272 /***************************************
273  **************  GMICRO  ***************
274  ***************************************/
275 #if defined (__gmicro__) && W_TYPE_SIZE == 32
276 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
277   __asm__ ("add.w %5,%1
278         addx %3,%0"                                                     \
279            : "=g" ((USItype)(sh)),                                      \
280              "=&g" ((USItype)(sl))                                      \
281            : "%0" ((USItype)(ah)),                                      \
282              "g" ((USItype)(bh)),                                       \
283              "%1" ((USItype)(al)),                                      \
284              "g" ((USItype)(bl)))
285 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
286   __asm__ ("sub.w %5,%1
287         subx %3,%0"                                                     \
288            : "=g" ((USItype)(sh)),                                      \
289              "=&g" ((USItype)(sl))                                      \
290            : "0" ((USItype)(ah)),                                       \
291              "g" ((USItype)(bh)),                                       \
292              "1" ((USItype)(al)),                                       \
293              "g" ((USItype)(bl)))
294 #define umul_ppmm(ph, pl, m0, m1) \
295   __asm__ ("mulx %3,%0,%1"                                              \
296            : "=g" ((USItype)(ph)),                                      \
297              "=r" ((USItype)(pl))                                       \
298            : "%0" ((USItype)(m0)),                                      \
299              "g" ((USItype)(m1)))
300 #define udiv_qrnnd(q, r, nh, nl, d) \
301   __asm__ ("divx %4,%0,%1"                                              \
302            : "=g" ((USItype)(q)),                                       \
303              "=r" ((USItype)(r))                                        \
304            : "1" ((USItype)(nh)),                                       \
305              "0" ((USItype)(nl)),                                       \
306              "g" ((USItype)(d)))
307 #define count_leading_zeros(count, x) \
308   __asm__ ("bsch/1 %1,%0"                                               \
309            : "=g" (count)                                               \
310            : "g" ((USItype)(x)),                                        \
311              "0" ((USItype)0))
312 #endif
313
314
315 /***************************************
316  **************  HPPA  *****************
317  ***************************************/
318 #if defined (__hppa) && W_TYPE_SIZE == 32
319 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
320   __asm__ ("add %4,%5,%1
321         addc %2,%3,%0"                                                  \
322            : "=r" ((USItype)(sh)),                                      \
323              "=&r" ((USItype)(sl))                                      \
324            : "%rM" ((USItype)(ah)),                                     \
325              "rM" ((USItype)(bh)),                                      \
326              "%rM" ((USItype)(al)),                                     \
327              "rM" ((USItype)(bl)))
328 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
329   __asm__ ("sub %4,%5,%1
330         subb %2,%3,%0"                                                  \
331            : "=r" ((USItype)(sh)),                                      \
332              "=&r" ((USItype)(sl))                                      \
333            : "rM" ((USItype)(ah)),                                      \
334              "rM" ((USItype)(bh)),                                      \
335              "rM" ((USItype)(al)),                                      \
336              "rM" ((USItype)(bl)))
337 #if defined (_PA_RISC1_1)
338 #define umul_ppmm(wh, wl, u, v) \
339   do {                                                                  \
340     union {UDItype __ll;                                                \
341            struct {USItype __h, __l;} __i;                              \
342           } __xx;                                                       \
343     __asm__ ("xmpyu %1,%2,%0"                                           \
344              : "=*f" (__xx.__ll)                                        \
345              : "*f" ((USItype)(u)),                                     \
346                "*f" ((USItype)(v)));                                    \
347     (wh) = __xx.__i.__h;                                                \
348     (wl) = __xx.__i.__l;                                                \
349   } while (0)
350 #define UMUL_TIME 8
351 #define UDIV_TIME 60
352 #else
353 #define UMUL_TIME 40
354 #define UDIV_TIME 80
355 #endif
356 #ifndef LONGLONG_STANDALONE
357 #define udiv_qrnnd(q, r, n1, n0, d) \
358   do { USItype __r;                                                     \
359     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
360     (r) = __r;                                                          \
361   } while (0)
362 extern USItype __udiv_qrnnd ();
363 #endif /* LONGLONG_STANDALONE */
364 #define count_leading_zeros(count, x) \
365   do {                                                                  \
366     USItype __tmp;                                                      \
367     __asm__ (                                                           \
368        "ldi             1,%0
369         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
370         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
371         ldo             16(%0),%0               ; Yes.  Perform add.
372         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
373         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
374         ldo             8(%0),%0                ; Yes.  Perform add.
375         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
376         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
377         ldo             4(%0),%0                ; Yes.  Perform add.
378         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
379         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
380         ldo             2(%0),%0                ; Yes.  Perform add.
381         extru           %1,30,1,%1              ; Extract bit 1.
382         sub             %0,%1,%0                ; Subtract it.
383         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
384   } while (0)
385 #endif /* hppa */
386
387
388 /***************************************
389  **************  I370  *****************
390  ***************************************/
391 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
392 #define umul_ppmm(xh, xl, m0, m1) \
393   do {                                                                  \
394     union {UDItype __ll;                                                \
395            struct {USItype __h, __l;} __i;                              \
396           } __xx;                                                       \
397     USItype __m0 = (m0), __m1 = (m1);                                   \
398     __asm__ ("mr %0,%3"                                                 \
399              : "=r" (__xx.__i.__h),                                     \
400                "=r" (__xx.__i.__l)                                      \
401              : "%1" (__m0),                                             \
402                "r" (__m1));                                             \
403     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
404     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
405              + (((SItype) __m1 >> 31) & __m0));                         \
406   } while (0)
407 #define smul_ppmm(xh, xl, m0, m1) \
408   do {                                                                  \
409     union {DItype __ll;                                                 \
410            struct {USItype __h, __l;} __i;                              \
411           } __xx;                                                       \
412     __asm__ ("mr %0,%3"                                                 \
413              : "=r" (__xx.__i.__h),                                     \
414                "=r" (__xx.__i.__l)                                      \
415              : "%1" (m0),                                               \
416                "r" (m1));                                               \
417     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
418   } while (0)
419 #define sdiv_qrnnd(q, r, n1, n0, d) \
420   do {                                                                  \
421     union {DItype __ll;                                                 \
422            struct {USItype __h, __l;} __i;                              \
423           } __xx;                                                       \
424     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
425     __asm__ ("dr %0,%2"                                                 \
426              : "=r" (__xx.__ll)                                         \
427              : "0" (__xx.__ll), "r" (d));                               \
428     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
429   } while (0)
430 #endif
431
432
433 /***************************************
434  **************  I386  *****************
435  ***************************************/
436 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
437 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
438   __asm__ ("addl %5,%1
439         adcl %3,%0"                                                     \
440            : "=r" ((USItype)(sh)),                                      \
441              "=&r" ((USItype)(sl))                                      \
442            : "%0" ((USItype)(ah)),                                      \
443              "g" ((USItype)(bh)),                                       \
444              "%1" ((USItype)(al)),                                      \
445              "g" ((USItype)(bl)))
446 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
447   __asm__ ("subl %5,%1
448         sbbl %3,%0"                                                     \
449            : "=r" ((USItype)(sh)),                                      \
450              "=&r" ((USItype)(sl))                                      \
451            : "0" ((USItype)(ah)),                                       \
452              "g" ((USItype)(bh)),                                       \
453              "1" ((USItype)(al)),                                       \
454              "g" ((USItype)(bl)))
455 #define umul_ppmm(w1, w0, u, v) \
456   __asm__ ("mull %3"                                                    \
457            : "=a" ((USItype)(w0)),                                      \
458              "=d" ((USItype)(w1))                                       \
459            : "%0" ((USItype)(u)),                                       \
460              "rm" ((USItype)(v)))
461 #define udiv_qrnnd(q, r, n1, n0, d) \
462   __asm__ ("divl %4"                                                    \
463            : "=a" ((USItype)(q)),                                       \
464              "=d" ((USItype)(r))                                        \
465            : "0" ((USItype)(n0)),                                       \
466              "1" ((USItype)(n1)),                                       \
467              "rm" ((USItype)(d)))
468 #define count_leading_zeros(count, x) \
469   do {                                                                  \
470     USItype __cbtmp;                                                    \
471     __asm__ ("bsrl %1,%0"                                               \
472              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
473     (count) = __cbtmp ^ 31;                                             \
474   } while (0)
475 #define count_trailing_zeros(count, x) \
476   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
477 #ifndef UMUL_TIME
478 #define UMUL_TIME 40
479 #endif
480 #ifndef UDIV_TIME
481 #define UDIV_TIME 40
482 #endif
483 #endif /* 80x86 */
484
485
486 /***************************************
487  **************  I860  *****************
488  ***************************************/
489 #if defined (__i860__) && W_TYPE_SIZE == 32
490 #define rshift_rhlc(r,h,l,c) \
491   __asm__ ("shr %3,r0,r0\;shrd %1,%2,%0"                                \
492            "=r" (r) : "r" (h), "r" (l), "rn" (c))
493 #endif /* i860 */
494
495 /***************************************
496  **************  I960  *****************
497  ***************************************/
498 #if defined (__i960__) && W_TYPE_SIZE == 32
499 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
500   __asm__ ("cmpo 1,0\;addc %5,%4,%1\;addc %3,%2,%0"                     \
501            : "=r" ((USItype)(sh)),                                      \
502              "=&r" ((USItype)(sl))                                      \
503            : "%dI" ((USItype)(ah)),                                     \
504              "dI" ((USItype)(bh)),                                      \
505              "%dI" ((USItype)(al)),                                     \
506              "dI" ((USItype)(bl)))
507 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
508   __asm__ ("cmpo 0,0\;subc %5,%4,%1\;subc %3,%2,%0"                     \
509            : "=r" ((USItype)(sh)),                                      \
510              "=&r" ((USItype)(sl))                                      \
511            : "dI" ((USItype)(ah)),                                      \
512              "dI" ((USItype)(bh)),                                      \
513              "dI" ((USItype)(al)),                                      \
514              "dI" ((USItype)(bl)))
515 #define umul_ppmm(w1, w0, u, v) \
516   ({union {UDItype __ll;                                                \
517            struct {USItype __l, __h;} __i;                              \
518           } __xx;                                                       \
519   __asm__ ("emul        %2,%1,%0"                                       \
520            : "=d" (__xx.__ll)                                           \
521            : "%dI" ((USItype)(u)),                                      \
522              "dI" ((USItype)(v)));                                      \
523   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
524 #define __umulsidi3(u, v) \
525   ({UDItype __w;                                                        \
526     __asm__ ("emul      %2,%1,%0"                                       \
527              : "=d" (__w)                                               \
528              : "%dI" ((USItype)(u)),                                    \
529                "dI" ((USItype)(v)));                                    \
530     __w; })
531 #define udiv_qrnnd(q, r, nh, nl, d) \
532   do {                                                                  \
533     union {UDItype __ll;                                                \
534            struct {USItype __l, __h;} __i;                              \
535           } __nn;                                                       \
536     __nn.__i.__h = (nh); __nn.__i.__l = (nl);                           \
537     __asm__ ("ediv %d,%n,%0"                                            \
538            : "=d" (__rq.__ll)                                           \
539            : "dI" (__nn.__ll),                                          \
540              "dI" ((USItype)(d)));                                      \
541     (r) = __rq.__i.__l; (q) = __rq.__i.__h;                             \
542   } while (0)
543 #define count_leading_zeros(count, x) \
544   do {                                                                  \
545     USItype __cbtmp;                                                    \
546     __asm__ ("scanbit %1,%0"                                            \
547              : "=r" (__cbtmp)                                           \
548              : "r" ((USItype)(x)));                                     \
549     (count) = __cbtmp ^ 31;                                             \
550   } while (0)
551 #define COUNT_LEADING_ZEROS_0 (-32) /* sic */
552 #if defined (__i960mx)          /* what is the proper symbol to test??? */
553 #define rshift_rhlc(r,h,l,c) \
554   do {                                                                  \
555     union {UDItype __ll;                                                \
556            struct {USItype __l, __h;} __i;                              \
557           } __nn;                                                       \
558     __nn.__i.__h = (h); __nn.__i.__l = (l);                             \
559     __asm__ ("shre %2,%1,%0"                                            \
560              : "=d" (r) : "dI" (__nn.__ll), "dI" (c));                  \
561   }
562 #endif /* i960mx */
563 #endif /* i960 */
564
565
566 /***************************************
567  **************  68000  ****************
568  ***************************************/
569 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
570 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
571   __asm__ ("add%.l %5,%1
572         addx%.l %3,%0"                                                  \
573            : "=d" ((USItype)(sh)),                                      \
574              "=&d" ((USItype)(sl))                                      \
575            : "%0" ((USItype)(ah)),                                      \
576              "d" ((USItype)(bh)),                                       \
577              "%1" ((USItype)(al)),                                      \
578              "g" ((USItype)(bl)))
579 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
580   __asm__ ("sub%.l %5,%1
581         subx%.l %3,%0"                                                  \
582            : "=d" ((USItype)(sh)),                                      \
583              "=&d" ((USItype)(sl))                                      \
584            : "0" ((USItype)(ah)),                                       \
585              "d" ((USItype)(bh)),                                       \
586              "1" ((USItype)(al)),                                       \
587              "g" ((USItype)(bl)))
588 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
589 #define umul_ppmm(w1, w0, u, v) \
590   __asm__ ("mulu%.l %3,%1:%0"                                           \
591            : "=d" ((USItype)(w0)),                                      \
592              "=d" ((USItype)(w1))                                       \
593            : "%0" ((USItype)(u)),                                       \
594              "dmi" ((USItype)(v)))
595 #define UMUL_TIME 45
596 #define udiv_qrnnd(q, r, n1, n0, d) \
597   __asm__ ("divu%.l %4,%1:%0"                                           \
598            : "=d" ((USItype)(q)),                                       \
599              "=d" ((USItype)(r))                                        \
600            : "0" ((USItype)(n0)),                                       \
601              "1" ((USItype)(n1)),                                       \
602              "dmi" ((USItype)(d)))
603 #define UDIV_TIME 90
604 #define sdiv_qrnnd(q, r, n1, n0, d) \
605   __asm__ ("divs%.l %4,%1:%0"                                           \
606            : "=d" ((USItype)(q)),                                       \
607              "=d" ((USItype)(r))                                        \
608            : "0" ((USItype)(n0)),                                       \
609              "1" ((USItype)(n1)),                                       \
610              "dmi" ((USItype)(d)))
611 #define count_leading_zeros(count, x) \
612   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
613            : "=d" ((USItype)(count))                                    \
614            : "od" ((USItype)(x)), "n" (0))
615 #define COUNT_LEADING_ZEROS_0 32
616 #else /* not mc68020 */
617 #define umul_ppmm(xh, xl, a, b) \
618   do { USItype __umul_tmp1, __umul_tmp2;                                \
619         __asm__ ("| Inlined umul_ppmm
620         move%.l %5,%3
621         move%.l %2,%0
622         move%.w %3,%1
623         swap    %3
624         swap    %0
625         mulu    %2,%1
626         mulu    %3,%0
627         mulu    %2,%3
628         swap    %2
629         mulu    %5,%2
630         add%.l  %3,%2
631         jcc     1f
632         add%.l  %#0x10000,%0
633 1:      move%.l %2,%3
634         clr%.w  %2
635         swap    %2
636         swap    %3
637         clr%.w  %3
638         add%.l  %3,%1
639         addx%.l %2,%0
640         | End inlined umul_ppmm"                                        \
641               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
642                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
643               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
644   } while (0)
645 #define UMUL_TIME 100
646 #define UDIV_TIME 400
647 #endif /* not mc68020 */
648 #endif /* mc68000 */
649
650
651 /***************************************
652  **************  88000  ****************
653  ***************************************/
654 #if defined (__m88000__) && W_TYPE_SIZE == 32
655 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
656   __asm__ ("addu.co %1,%r4,%r5
657         addu.ci %0,%r2,%r3"                                             \
658            : "=r" ((USItype)(sh)),                                      \
659              "=&r" ((USItype)(sl))                                      \
660            : "%rJ" ((USItype)(ah)),                                     \
661              "rJ" ((USItype)(bh)),                                      \
662              "%rJ" ((USItype)(al)),                                     \
663              "rJ" ((USItype)(bl)))
664 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
665   __asm__ ("subu.co %1,%r4,%r5
666         subu.ci %0,%r2,%r3"                                             \
667            : "=r" ((USItype)(sh)),                                      \
668              "=&r" ((USItype)(sl))                                      \
669            : "rJ" ((USItype)(ah)),                                      \
670              "rJ" ((USItype)(bh)),                                      \
671              "rJ" ((USItype)(al)),                                      \
672              "rJ" ((USItype)(bl)))
673 #define count_leading_zeros(count, x) \
674   do {                                                                  \
675     USItype __cbtmp;                                                    \
676     __asm__ ("ff1 %0,%1"                                                \
677              : "=r" (__cbtmp)                                           \
678              : "r" ((USItype)(x)));                                     \
679     (count) = __cbtmp ^ 31;                                             \
680   } while (0)
681 #define COUNT_LEADING_ZEROS_0 63 /* sic */
682 #if defined (__m88110__)
683 #define umul_ppmm(wh, wl, u, v) \
684   do {                                                                  \
685     union {UDItype __ll;                                                \
686            struct {USItype __h, __l;} __i;                              \
687           } __x;                                                        \
688     __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v));   \
689     (wh) = __x.__i.__h;                                                 \
690     (wl) = __x.__i.__l;                                                 \
691   } while (0)
692 #define udiv_qrnnd(q, r, n1, n0, d) \
693   ({union {UDItype __ll;                                                \
694            struct {USItype __h, __l;} __i;                              \
695           } __x, __q;                                                   \
696   __x.__i.__h = (n1); __x.__i.__l = (n0);                               \
697   __asm__ ("divu.d %0,%1,%2"                                            \
698            : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d));                \
699   (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
700 #define UMUL_TIME 5
701 #define UDIV_TIME 25
702 #else
703 #define UMUL_TIME 17
704 #define UDIV_TIME 150
705 #endif /* __m88110__ */
706 #endif /* __m88000__ */
707
708
709 /***************************************
710  **************  MIPS  *****************
711  ***************************************/
712 #if defined (__mips__) && W_TYPE_SIZE == 32
713 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
714 #define umul_ppmm(w1, w0, u, v) \
715   __asm__ ("multu %2,%3"                                                \
716            : "=l" ((USItype)(w0)),                                      \
717              "=h" ((USItype)(w1))                                       \
718            : "d" ((USItype)(u)),                                        \
719              "d" ((USItype)(v)))
720 #else
721 #define umul_ppmm(w1, w0, u, v) \
722   __asm__ ("multu %2,%3
723         mflo %0
724         mfhi %1"                                                        \
725            : "=d" ((USItype)(w0)),                                      \
726              "=d" ((USItype)(w1))                                       \
727            : "d" ((USItype)(u)),                                        \
728              "d" ((USItype)(v)))
729 #endif
730 #define UMUL_TIME 10
731 #define UDIV_TIME 100
732 #endif /* __mips__ */
733
734 /***************************************
735  **************  MIPS/64  **************
736  ***************************************/
737 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
738 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
739 #define umul_ppmm(w1, w0, u, v) \
740   __asm__ ("dmultu %2,%3"                                               \
741            : "=l" ((UDItype)(w0)),                                      \
742              "=h" ((UDItype)(w1))                                       \
743            : "d" ((UDItype)(u)),                                        \
744              "d" ((UDItype)(v)))
745 #else
746 #define umul_ppmm(w1, w0, u, v) \
747   __asm__ ("dmultu %2,%3
748         mflo %0
749         mfhi %1"                                                        \
750            : "=d" ((UDItype)(w0)),                                      \
751              "=d" ((UDItype)(w1))                                       \
752            : "d" ((UDItype)(u)),                                        \
753              "d" ((UDItype)(v)))
754 #endif
755 #define UMUL_TIME 20
756 #define UDIV_TIME 140
757 #endif /* __mips__ */
758
759
760 /***************************************
761  **************  32000  ****************
762  ***************************************/
763 #if defined (__ns32000__) && W_TYPE_SIZE == 32
764 #define umul_ppmm(w1, w0, u, v) \
765   ({union {UDItype __ll;                                                \
766            struct {USItype __l, __h;} __i;                              \
767           } __xx;                                                       \
768   __asm__ ("meid %2,%0"                                                 \
769            : "=g" (__xx.__ll)                                           \
770            : "%0" ((USItype)(u)),                                       \
771              "g" ((USItype)(v)));                                       \
772   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
773 #define __umulsidi3(u, v) \
774   ({UDItype __w;                                                        \
775     __asm__ ("meid %2,%0"                                               \
776              : "=g" (__w)                                               \
777              : "%0" ((USItype)(u)),                                     \
778                "g" ((USItype)(v)));                                     \
779     __w; })
780 #define udiv_qrnnd(q, r, n1, n0, d) \
781   ({union {UDItype __ll;                                                \
782            struct {USItype __l, __h;} __i;                              \
783           } __xx;                                                       \
784   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
785   __asm__ ("deid %2,%0"                                                 \
786            : "=g" (__xx.__ll)                                           \
787            : "0" (__xx.__ll),                                           \
788              "g" ((USItype)(d)));                                       \
789   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
790 #define count_trailing_zeros(count,x) \
791   do {
792     __asm__ ("ffsd      %2,%0"                                          \
793              : "=r" ((USItype) (count))                                 \
794              : "0" ((USItype) 0),                                       \
795                "r" ((USItype) (x)));                                    \
796   } while (0)
797 #endif /* __ns32000__ */
798
799
800 /***************************************
801  **************  PPC  ******************
802  ***************************************/
803 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
804 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
805   do {                                                                  \
806     if (__builtin_constant_p (bh) && (bh) == 0)                         \
807       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
808              : "=r" ((USItype)(sh)),                                    \
809                "=&r" ((USItype)(sl))                                    \
810              : "%r" ((USItype)(ah)),                                    \
811                "%r" ((USItype)(al)),                                    \
812                "rI" ((USItype)(bl)));                                   \
813     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
814       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
815              : "=r" ((USItype)(sh)),                                    \
816                "=&r" ((USItype)(sl))                                    \
817              : "%r" ((USItype)(ah)),                                    \
818                "%r" ((USItype)(al)),                                    \
819                "rI" ((USItype)(bl)));                                   \
820     else                                                                \
821       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
822              : "=r" ((USItype)(sh)),                                    \
823                "=&r" ((USItype)(sl))                                    \
824              : "%r" ((USItype)(ah)),                                    \
825                "r" ((USItype)(bh)),                                     \
826                "%r" ((USItype)(al)),                                    \
827                "rI" ((USItype)(bl)));                                   \
828   } while (0)
829 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
830   do {                                                                  \
831     if (__builtin_constant_p (ah) && (ah) == 0)                         \
832       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
833                : "=r" ((USItype)(sh)),                                  \
834                  "=&r" ((USItype)(sl))                                  \
835                : "r" ((USItype)(bh)),                                   \
836                  "rI" ((USItype)(al)),                                  \
837                  "r" ((USItype)(bl)));                                  \
838     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
839       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
840                : "=r" ((USItype)(sh)),                                  \
841                  "=&r" ((USItype)(sl))                                  \
842                : "r" ((USItype)(bh)),                                   \
843                  "rI" ((USItype)(al)),                                  \
844                  "r" ((USItype)(bl)));                                  \
845     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
846       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
847                : "=r" ((USItype)(sh)),                                  \
848                  "=&r" ((USItype)(sl))                                  \
849                : "r" ((USItype)(ah)),                                   \
850                  "rI" ((USItype)(al)),                                  \
851                  "r" ((USItype)(bl)));                                  \
852     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
853       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
854                : "=r" ((USItype)(sh)),                                  \
855                  "=&r" ((USItype)(sl))                                  \
856                : "r" ((USItype)(ah)),                                   \
857                  "rI" ((USItype)(al)),                                  \
858                  "r" ((USItype)(bl)));                                  \
859     else                                                                \
860       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
861                : "=r" ((USItype)(sh)),                                  \
862                  "=&r" ((USItype)(sl))                                  \
863                : "r" ((USItype)(ah)),                                   \
864                  "r" ((USItype)(bh)),                                   \
865                  "rI" ((USItype)(al)),                                  \
866                  "r" ((USItype)(bl)));                                  \
867   } while (0)
868 #define count_leading_zeros(count, x) \
869   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
870            : "=r" ((USItype)(count))                                    \
871            : "r" ((USItype)(x)))
872 #define COUNT_LEADING_ZEROS_0 32
873 #if defined (_ARCH_PPC)
874 #define umul_ppmm(ph, pl, m0, m1) \
875   do {                                                                  \
876     USItype __m0 = (m0), __m1 = (m1);                                   \
877     __asm__ ("mulhwu %0,%1,%2"                                          \
878              : "=r" ((USItype) ph)                                      \
879              : "%r" (__m0),                                             \
880                "r" (__m1));                                             \
881     (pl) = __m0 * __m1;                                                 \
882   } while (0)
883 #define UMUL_TIME 15
884 #define smul_ppmm(ph, pl, m0, m1) \
885   do {                                                                  \
886     SItype __m0 = (m0), __m1 = (m1);                                    \
887     __asm__ ("mulhw %0,%1,%2"                                           \
888              : "=r" ((SItype) ph)                                       \
889              : "%r" (__m0),                                             \
890                "r" (__m1));                                             \
891     (pl) = __m0 * __m1;                                                 \
892   } while (0)
893 #define SMUL_TIME 14
894 #define UDIV_TIME 120
895 #else
896 #define umul_ppmm(xh, xl, m0, m1) \
897   do {                                                                  \
898     USItype __m0 = (m0), __m1 = (m1);                                   \
899     __asm__ ("mul %0,%2,%3"                                             \
900              : "=r" ((USItype)(xh)),                                    \
901                "=q" ((USItype)(xl))                                     \
902              : "r" (__m0),                                              \
903                "r" (__m1));                                             \
904     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
905              + (((SItype) __m1 >> 31) & __m0));                         \
906   } while (0)
907 #define UMUL_TIME 8
908 #define smul_ppmm(xh, xl, m0, m1) \
909   __asm__ ("mul %0,%2,%3"                                               \
910            : "=r" ((SItype)(xh)),                                       \
911              "=q" ((SItype)(xl))                                        \
912            : "r" (m0),                                                  \
913              "r" (m1))
914 #define SMUL_TIME 4
915 #define sdiv_qrnnd(q, r, nh, nl, d) \
916   __asm__ ("div %0,%2,%4"                                               \
917            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
918            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
919 #define UDIV_TIME 100
920 #endif
921 #endif /* Power architecture variants.  */
922
923
924 /***************************************
925  **************  PYR  ******************
926  ***************************************/
927 #if defined (__pyr__) && W_TYPE_SIZE == 32
928 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
929   __asm__ ("addw        %5,%1
930         addwc   %3,%0"                                                  \
931            : "=r" ((USItype)(sh)),                                      \
932              "=&r" ((USItype)(sl))                                      \
933            : "%0" ((USItype)(ah)),                                      \
934              "g" ((USItype)(bh)),                                       \
935              "%1" ((USItype)(al)),                                      \
936              "g" ((USItype)(bl)))
937 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
938   __asm__ ("subw        %5,%1
939         subwb   %3,%0"                                                  \
940            : "=r" ((USItype)(sh)),                                      \
941              "=&r" ((USItype)(sl))                                      \
942            : "0" ((USItype)(ah)),                                       \
943              "g" ((USItype)(bh)),                                       \
944              "1" ((USItype)(al)),                                       \
945              "g" ((USItype)(bl)))
946 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
947 #define umul_ppmm(w1, w0, u, v) \
948   ({union {UDItype __ll;                                                \
949            struct {USItype __h, __l;} __i;                              \
950           } __xx;                                                       \
951   __asm__ ("movw %1,%R0
952         uemul %2,%0"                                                    \
953            : "=&r" (__xx.__ll)                                          \
954            : "g" ((USItype) (u)),                                       \
955              "g" ((USItype)(v)));                                       \
956   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
957 #endif /* __pyr__ */
958
959
960 /***************************************
961  **************  RT/ROMP  **************
962  ***************************************/
963 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
964 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
965   __asm__ ("a %1,%5
966         ae %0,%3"                                                       \
967            : "=r" ((USItype)(sh)),                                      \
968              "=&r" ((USItype)(sl))                                      \
969            : "%0" ((USItype)(ah)),                                      \
970              "r" ((USItype)(bh)),                                       \
971              "%1" ((USItype)(al)),                                      \
972              "r" ((USItype)(bl)))
973 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
974   __asm__ ("s %1,%5
975         se %0,%3"                                                       \
976            : "=r" ((USItype)(sh)),                                      \
977              "=&r" ((USItype)(sl))                                      \
978            : "0" ((USItype)(ah)),                                       \
979              "r" ((USItype)(bh)),                                       \
980              "1" ((USItype)(al)),                                       \
981              "r" ((USItype)(bl)))
982 #define umul_ppmm(ph, pl, m0, m1) \
983   do {                                                                  \
984     USItype __m0 = (m0), __m1 = (m1);                                   \
985     __asm__ (                                                           \
986        "s       r2,r2
987         mts     r10,%2
988         m       r2,%3
989         m       r2,%3
990         m       r2,%3
991         m       r2,%3
992         m       r2,%3
993         m       r2,%3
994         m       r2,%3
995         m       r2,%3
996         m       r2,%3
997         m       r2,%3
998         m       r2,%3
999         m       r2,%3
1000         m       r2,%3
1001         m       r2,%3
1002         m       r2,%3
1003         m       r2,%3
1004         cas     %0,r2,r0
1005         mfs     r10,%1"                                                 \
1006              : "=r" ((USItype)(ph)),                                    \
1007                "=r" ((USItype)(pl))                                     \
1008              : "%r" (__m0),                                             \
1009                 "r" (__m1)                                              \
1010              : "r2");                                                   \
1011     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
1012              + (((SItype) __m1 >> 31) & __m0));                         \
1013   } while (0)
1014 #define UMUL_TIME 20
1015 #define UDIV_TIME 200
1016 #define count_leading_zeros(count, x) \
1017   do {                                                                  \
1018     if ((x) >= 0x10000)                                                 \
1019       __asm__ ("clz     %0,%1"                                          \
1020                : "=r" ((USItype)(count))                                \
1021                : "r" ((USItype)(x) >> 16));                             \
1022     else                                                                \
1023       {                                                                 \
1024         __asm__ ("clz   %0,%1"                                          \
1025                  : "=r" ((USItype)(count))                              \
1026                  : "r" ((USItype)(x)));                                 \
1027         (count) += 16;                                                  \
1028       }                                                                 \
1029   } while (0)
1030 #endif /* RT/ROMP */
1031
1032
1033 /***************************************
1034  **************  SH2  ******************
1035  ***************************************/
1036 #if defined (__sh2__) && W_TYPE_SIZE == 32
1037 #define umul_ppmm(w1, w0, u, v) \
1038   __asm__ (                                                             \
1039        "dmulu.l %2,%3
1040         sts     macl,%1
1041         sts     mach,%0"                                                \
1042            : "=r" ((USItype)(w1)),                                      \
1043              "=r" ((USItype)(w0))                                       \
1044            : "r" ((USItype)(u)),                                        \
1045              "r" ((USItype)(v))                                         \
1046            : "macl", "mach")
1047 #define UMUL_TIME 5
1048 #endif
1049
1050 /***************************************
1051  **************  SPARC  ****************
1052  ***************************************/
1053 #if defined (__sparc__) && W_TYPE_SIZE == 32
1054 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1055   __asm__ ("addcc %r4,%5,%1
1056         addx %r2,%3,%0"                                                 \
1057            : "=r" ((USItype)(sh)),                                      \
1058              "=&r" ((USItype)(sl))                                      \
1059            : "%rJ" ((USItype)(ah)),                                     \
1060              "rI" ((USItype)(bh)),                                      \
1061              "%rJ" ((USItype)(al)),                                     \
1062              "rI" ((USItype)(bl))                                       \
1063            __CLOBBER_CC)
1064 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1065   __asm__ ("subcc %r4,%5,%1
1066         subx %r2,%3,%0"                                                 \
1067            : "=r" ((USItype)(sh)),                                      \
1068              "=&r" ((USItype)(sl))                                      \
1069            : "rJ" ((USItype)(ah)),                                      \
1070              "rI" ((USItype)(bh)),                                      \
1071              "rJ" ((USItype)(al)),                                      \
1072              "rI" ((USItype)(bl))                                       \
1073            __CLOBBER_CC)
1074 #if defined (__sparc_v8__)
1075 /* Don't match immediate range because, 1) it is not often useful,
1076    2) the 'I' flag thinks of the range as a 13 bit signed interval,
1077    while we want to match a 13 bit interval, sign extended to 32 bits,
1078    but INTERPRETED AS UNSIGNED.  */
1079 #define umul_ppmm(w1, w0, u, v) \
1080   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1081            : "=r" ((USItype)(w1)),                                      \
1082              "=r" ((USItype)(w0))                                       \
1083            : "r" ((USItype)(u)),                                        \
1084              "r" ((USItype)(v)))
1085 #define UMUL_TIME 5
1086 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
1087 #define udiv_qrnnd(q, r, n1, n0, d) \
1088   do {                                                                  \
1089     USItype __q;                                                        \
1090     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
1091              : "=r" ((USItype)(__q))                                    \
1092              : "r" ((USItype)(n1)),                                     \
1093                "r" ((USItype)(n0)),                                     \
1094                "r" ((USItype)(d)));                                     \
1095     (r) = (n0) - __q * (d);                                             \
1096     (q) = __q;                                                          \
1097   } while (0)
1098 #define UDIV_TIME 25
1099 #endif /* SUPERSPARC */
1100 #else /* ! __sparc_v8__ */
1101 #if defined (__sparclite__)
1102 /* This has hardware multiply but not divide.  It also has two additional
1103    instructions scan (ffs from high bit) and divscc.  */
1104 #define umul_ppmm(w1, w0, u, v) \
1105   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1106            : "=r" ((USItype)(w1)),                                      \
1107              "=r" ((USItype)(w0))                                       \
1108            : "r" ((USItype)(u)),                                        \
1109              "r" ((USItype)(v)))
1110 #define UMUL_TIME 5
1111 #define udiv_qrnnd(q, r, n1, n0, d) \
1112   __asm__ ("! Inlined udiv_qrnnd
1113         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
1114         tst     %%g0
1115         divscc  %3,%4,%%g1
1116         divscc  %%g1,%4,%%g1
1117         divscc  %%g1,%4,%%g1
1118         divscc  %%g1,%4,%%g1
1119         divscc  %%g1,%4,%%g1
1120         divscc  %%g1,%4,%%g1
1121         divscc  %%g1,%4,%%g1
1122         divscc  %%g1,%4,%%g1
1123         divscc  %%g1,%4,%%g1
1124         divscc  %%g1,%4,%%g1
1125         divscc  %%g1,%4,%%g1
1126         divscc  %%g1,%4,%%g1
1127         divscc  %%g1,%4,%%g1
1128         divscc  %%g1,%4,%%g1
1129         divscc  %%g1,%4,%%g1
1130         divscc  %%g1,%4,%%g1
1131         divscc  %%g1,%4,%%g1
1132         divscc  %%g1,%4,%%g1
1133         divscc  %%g1,%4,%%g1
1134         divscc  %%g1,%4,%%g1
1135         divscc  %%g1,%4,%%g1
1136         divscc  %%g1,%4,%%g1
1137         divscc  %%g1,%4,%%g1
1138         divscc  %%g1,%4,%%g1
1139         divscc  %%g1,%4,%%g1
1140         divscc  %%g1,%4,%%g1
1141         divscc  %%g1,%4,%%g1
1142         divscc  %%g1,%4,%%g1
1143         divscc  %%g1,%4,%%g1
1144         divscc  %%g1,%4,%%g1
1145         divscc  %%g1,%4,%%g1
1146         divscc  %%g1,%4,%0
1147         rd      %%y,%1
1148         bl,a 1f
1149         add     %1,%4,%1
1150 1:      ! End of inline udiv_qrnnd"                                     \
1151            : "=r" ((USItype)(q)),                                       \
1152              "=r" ((USItype)(r))                                        \
1153            : "r" ((USItype)(n1)),                                       \
1154              "r" ((USItype)(n0)),                                       \
1155              "rI" ((USItype)(d))                                        \
1156            : "%g1" __AND_CLOBBER_CC)
1157 #define UDIV_TIME 37
1158 #define count_leading_zeros(count, x) \
1159   __asm__ ("scan %1,0,%0"                                               \
1160            : "=r" ((USItype)(x))                                        \
1161            : "r" ((USItype)(count)))
1162 /* Early sparclites return 63 for an argument of 0, but they warn that future
1163    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1164    undefined.  */
1165 #endif /* __sparclite__ */
1166 #endif /* __sparc_v8__ */
1167 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1168 #ifndef umul_ppmm
1169 #define umul_ppmm(w1, w0, u, v) \
1170   __asm__ ("! Inlined umul_ppmm
1171         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1172         sra     %3,31,%%g2      ! Don't move this insn
1173         and     %2,%%g2,%%g2    ! Don't move this insn
1174         andcc   %%g0,0,%%g1     ! Don't move this insn
1175         mulscc  %%g1,%3,%%g1
1176         mulscc  %%g1,%3,%%g1
1177         mulscc  %%g1,%3,%%g1
1178         mulscc  %%g1,%3,%%g1
1179         mulscc  %%g1,%3,%%g1
1180         mulscc  %%g1,%3,%%g1
1181         mulscc  %%g1,%3,%%g1
1182         mulscc  %%g1,%3,%%g1
1183         mulscc  %%g1,%3,%%g1
1184         mulscc  %%g1,%3,%%g1
1185         mulscc  %%g1,%3,%%g1
1186         mulscc  %%g1,%3,%%g1
1187         mulscc  %%g1,%3,%%g1
1188         mulscc  %%g1,%3,%%g1
1189         mulscc  %%g1,%3,%%g1
1190         mulscc  %%g1,%3,%%g1
1191         mulscc  %%g1,%3,%%g1
1192         mulscc  %%g1,%3,%%g1
1193         mulscc  %%g1,%3,%%g1
1194         mulscc  %%g1,%3,%%g1
1195         mulscc  %%g1,%3,%%g1
1196         mulscc  %%g1,%3,%%g1
1197         mulscc  %%g1,%3,%%g1
1198         mulscc  %%g1,%3,%%g1
1199         mulscc  %%g1,%3,%%g1
1200         mulscc  %%g1,%3,%%g1
1201         mulscc  %%g1,%3,%%g1
1202         mulscc  %%g1,%3,%%g1
1203         mulscc  %%g1,%3,%%g1
1204         mulscc  %%g1,%3,%%g1
1205         mulscc  %%g1,%3,%%g1
1206         mulscc  %%g1,%3,%%g1
1207         mulscc  %%g1,0,%%g1
1208         add     %%g1,%%g2,%0
1209         rd      %%y,%1"                                                 \
1210            : "=r" ((USItype)(w1)),                                      \
1211              "=r" ((USItype)(w0))                                       \
1212            : "%rI" ((USItype)(u)),                                      \
1213              "r" ((USItype)(v))                                         \
1214            : "%g1", "%g2" __AND_CLOBBER_CC)
1215 #define UMUL_TIME 39            /* 39 instructions */
1216 #endif
1217 #ifndef udiv_qrnnd
1218 #ifndef LONGLONG_STANDALONE
1219 #define udiv_qrnnd(q, r, n1, n0, d) \
1220   do { USItype __r;                                                     \
1221     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
1222     (r) = __r;                                                          \
1223   } while (0)
1224 extern USItype __udiv_qrnnd ();
1225 #define UDIV_TIME 140
1226 #endif /* LONGLONG_STANDALONE */
1227 #endif /* udiv_qrnnd */
1228 #endif /* __sparc__ */
1229
1230
1231 /***************************************
1232  **************  VAX  ******************
1233  ***************************************/
1234 #if defined (__vax__) && W_TYPE_SIZE == 32
1235 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1236   __asm__ ("addl2 %5,%1
1237         adwc %3,%0"                                                     \
1238            : "=g" ((USItype)(sh)),                                      \
1239              "=&g" ((USItype)(sl))                                      \
1240            : "%0" ((USItype)(ah)),                                      \
1241              "g" ((USItype)(bh)),                                       \
1242              "%1" ((USItype)(al)),                                      \
1243              "g" ((USItype)(bl)))
1244 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1245   __asm__ ("subl2 %5,%1
1246         sbwc %3,%0"                                                     \
1247            : "=g" ((USItype)(sh)),                                      \
1248              "=&g" ((USItype)(sl))                                      \
1249            : "0" ((USItype)(ah)),                                       \
1250              "g" ((USItype)(bh)),                                       \
1251              "1" ((USItype)(al)),                                       \
1252              "g" ((USItype)(bl)))
1253 #define umul_ppmm(xh, xl, m0, m1) \
1254   do {                                                                  \
1255     union {UDItype __ll;                                                \
1256            struct {USItype __l, __h;} __i;                              \
1257           } __xx;                                                       \
1258     USItype __m0 = (m0), __m1 = (m1);                                   \
1259     __asm__ ("emul %1,%2,$0,%0"                                         \
1260              : "=g" (__xx.__ll)                                         \
1261              : "g" (__m0),                                              \
1262                "g" (__m1));                                             \
1263     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1264     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1265              + (((SItype) __m1 >> 31) & __m0));                         \
1266   } while (0)
1267 #define sdiv_qrnnd(q, r, n1, n0, d) \
1268   do {                                                                  \
1269     union {DItype __ll;                                                 \
1270            struct {SItype __l, __h;} __i;                               \
1271           } __xx;                                                       \
1272     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1273     __asm__ ("ediv %3,%2,%0,%1"                                         \
1274              : "=g" (q), "=g" (r)                                       \
1275              : "g" (__xx.__ll), "g" (d));                               \
1276   } while (0)
1277 #endif /* __vax__ */
1278
1279
1280 /***************************************
1281  **************  Z8000  ****************
1282  ***************************************/
1283 #if defined (__z8000__) && W_TYPE_SIZE == 16
1284 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1285   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1286            : "=r" ((unsigned int)(sh)),                                 \
1287              "=&r" ((unsigned int)(sl))                                 \
1288            : "%0" ((unsigned int)(ah)),                                 \
1289              "r" ((unsigned int)(bh)),                                  \
1290              "%1" ((unsigned int)(al)),                                 \
1291              "rQR" ((unsigned int)(bl)))
1292 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1293   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1294            : "=r" ((unsigned int)(sh)),                                 \
1295              "=&r" ((unsigned int)(sl))                                 \
1296            : "0" ((unsigned int)(ah)),                                  \
1297              "r" ((unsigned int)(bh)),                                  \
1298              "1" ((unsigned int)(al)),                                  \
1299              "rQR" ((unsigned int)(bl)))
1300 #define umul_ppmm(xh, xl, m0, m1) \
1301   do {                                                                  \
1302     union {long int __ll;                                               \
1303            struct {unsigned int __h, __l;} __i;                         \
1304           } __xx;                                                       \
1305     unsigned int __m0 = (m0), __m1 = (m1);                              \
1306     __asm__ ("mult      %S0,%H3"                                        \
1307              : "=r" (__xx.__i.__h),                                     \
1308                "=r" (__xx.__i.__l)                                      \
1309              : "%1" (__m0),                                             \
1310                "rQR" (__m1));                                           \
1311     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1312     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1313              + (((signed int) __m1 >> 15) & __m0));                     \
1314   } while (0)
1315 #endif /* __z8000__ */
1316
1317 #endif /* __GNUC__ */
1318 #endif /* !__riscos__ */
1319
1320
1321 /***************************************
1322  ***********  Generic Versions  ********
1323  ***************************************/
1324 #if !defined (umul_ppmm) && defined (__umulsidi3)
1325 #define umul_ppmm(ph, pl, m0, m1) \
1326   {                                                                     \
1327     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1328     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1329     pl = (UWtype) __ll;                                                 \
1330   }
1331 #endif
1332
1333 #if !defined (__umulsidi3)
1334 #define __umulsidi3(u, v) \
1335   ({UWtype __hi, __lo;                                                  \
1336     umul_ppmm (__hi, __lo, u, v);                                       \
1337     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1338 #endif
1339
1340 /* If this machine has no inline assembler, use C macros.  */
1341
1342 #if !defined (add_ssaaaa)
1343 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1344   do {                                                                  \
1345     UWtype __x;                                                         \
1346     __x = (al) + (bl);                                                  \
1347     (sh) = (ah) + (bh) + (__x < (al));                                  \
1348     (sl) = __x;                                                         \
1349   } while (0)
1350 #endif
1351
1352 #if !defined (sub_ddmmss)
1353 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1354   do {                                                                  \
1355     UWtype __x;                                                         \
1356     __x = (al) - (bl);                                                  \
1357     (sh) = (ah) - (bh) - (__x > (al));                                  \
1358     (sl) = __x;                                                         \
1359   } while (0)
1360 #endif
1361
1362 #if !defined (umul_ppmm)
1363 #define umul_ppmm(w1, w0, u, v)                                         \
1364   do {                                                                  \
1365     UWtype __x0, __x1, __x2, __x3;                                      \
1366     UHWtype __ul, __vl, __uh, __vh;                                     \
1367     UWtype __u = (u), __v = (v);                                        \
1368                                                                         \
1369     __ul = __ll_lowpart (__u);                                          \
1370     __uh = __ll_highpart (__u);                                         \
1371     __vl = __ll_lowpart (__v);                                          \
1372     __vh = __ll_highpart (__v);                                         \
1373                                                                         \
1374     __x0 = (UWtype) __ul * __vl;                                        \
1375     __x1 = (UWtype) __ul * __vh;                                        \
1376     __x2 = (UWtype) __uh * __vl;                                        \
1377     __x3 = (UWtype) __uh * __vh;                                        \
1378                                                                         \
1379     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1380     __x1 += __x2;               /* but this indeed can */               \
1381     if (__x1 < __x2)            /* did we get it? */                    \
1382       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1383                                                                         \
1384     (w1) = __x3 + __ll_highpart (__x1);                                 \
1385     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1386   } while (0)
1387 #endif
1388
1389 #if !defined (umul_ppmm)
1390 #define smul_ppmm(w1, w0, u, v)                                         \
1391   do {                                                                  \
1392     UWtype __w1;                                                        \
1393     UWtype __m0 = (u), __m1 = (v);                                      \
1394     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1395     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1396                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1397   } while (0)
1398 #endif
1399
1400 /* Define this unconditionally, so it can be used for debugging.  */
1401 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1402   do {                                                                  \
1403     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1404     __d1 = __ll_highpart (d);                                           \
1405     __d0 = __ll_lowpart (d);                                            \
1406                                                                         \
1407     __r1 = (n1) % __d1;                                                 \
1408     __q1 = (n1) / __d1;                                                 \
1409     __m = (UWtype) __q1 * __d0;                                         \
1410     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1411     if (__r1 < __m)                                                     \
1412       {                                                                 \
1413         __q1--, __r1 += (d);                                            \
1414         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1415           if (__r1 < __m)                                               \
1416             __q1--, __r1 += (d);                                        \
1417       }                                                                 \
1418     __r1 -= __m;                                                        \
1419                                                                         \
1420     __r0 = __r1 % __d1;                                                 \
1421     __q0 = __r1 / __d1;                                                 \
1422     __m = (UWtype) __q0 * __d0;                                         \
1423     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1424     if (__r0 < __m)                                                     \
1425       {                                                                 \
1426         __q0--, __r0 += (d);                                            \
1427         if (__r0 >= (d))                                                \
1428           if (__r0 < __m)                                               \
1429             __q0--, __r0 += (d);                                        \
1430       }                                                                 \
1431     __r0 -= __m;                                                        \
1432                                                                         \
1433     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1434     (r) = __r0;                                                         \
1435   } while (0)
1436
1437 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1438    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1439 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1440 #define udiv_qrnnd(q, r, nh, nl, d) \
1441   do {                                                                  \
1442     UWtype __r;                                                         \
1443     (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d);                         \
1444     (r) = __r;                                                          \
1445   } while (0)
1446 #endif
1447
1448 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1449 #if !defined (udiv_qrnnd)
1450 #define UDIV_NEEDS_NORMALIZATION 1
1451 #define udiv_qrnnd __udiv_qrnnd_c
1452 #endif
1453
1454 #if !defined (count_leading_zeros)
1455 extern
1456 #ifdef __STDC__
1457 const
1458 #endif
1459 unsigned char __clz_tab[];
1460 #define MPI_INTERNAL_NEED_CLZ_TAB 1
1461 #define count_leading_zeros(count, x) \
1462   do {                                                                  \
1463     UWtype __xr = (x);                                                  \
1464     UWtype __a;                                                         \
1465                                                                         \
1466     if (W_TYPE_SIZE <= 32)                                              \
1467       {                                                                 \
1468         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1469           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1470           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1471       }                                                                 \
1472     else                                                                \
1473       {                                                                 \
1474         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1475           if (((__xr >> __a) & 0xff) != 0)                              \
1476             break;                                                      \
1477       }                                                                 \
1478                                                                         \
1479     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1480   } while (0)
1481 /* This version gives a well-defined value for zero. */
1482 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1483 #endif
1484
1485 #if !defined (count_trailing_zeros)
1486 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1487    defined in asm, but if it is not, the C version above is good enough.  */
1488 #define count_trailing_zeros(count, x) \
1489   do {                                                                  \
1490     UWtype __ctz_x = (x);                                               \
1491     UWtype __ctz_c;                                                     \
1492     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1493     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1494   } while (0)
1495 #endif
1496
1497 #ifndef UDIV_NEEDS_NORMALIZATION
1498 #define UDIV_NEEDS_NORMALIZATION 0
1499 #endif